CMOS image sensor

Abstract

Disclosed is a CMOS image sensor that controls a reset voltage to reduce reset noise caused by a reset operation of the CMOS image sensor, fixed pattern noise caused by different characteristics of detection circuits, and image lag caused by the influence of a previous image signal upon the current output signal, thereby achieving a high signal to noise ratio.

1. A CMOS image sensor comprising a photodiode, a reset switch for removing a photo-induced charge accumulated on the photodiode, an amplifier for detecting a pixel output voltage based on the photo-induced charge accumulated on the photodiode, and a selection switch for outputting the voltage detected by the amplifier, wherein the photodiode, the reset switch, the amplifier, and the selection switch are formed on a substrate through a CMOS manufacturing process, the CMOS image sensor further comprising:
 a current source for regularly decreasing a node voltage of the photodiode; 
 a comparator for comparing an output voltage of the amplifier with a reference voltage for controlling the current source to reset the photodiode; and 
 a memory for storing a digital value corresponding to the reference voltage, 
 wherein the current source comprises:
 a buffer transistor with a constant gate voltage being applied thereto; 
 a capacitor having one end connected to a source of the buffer transistor; 
 a voltage source for supplying a regularly varying voltage, the voltage source being connected to the other end of the capacitor; and 
 a current on/off switch for controlling the buffer transistor based on an output value of the comparator, the current on/off switch being connected to the source of the buffer transistor. 
 
 
     
     
       2. The sensor according to  claim 1 , further comprising:
 a counter for sequentially outputting a digital value; and 
 a digital-to-analog converter for converting the digital value output from the counter to an analog value having the reference voltage. 
 
     
     
       3. The sensor according to  claim 2 , wherein the digital value output from the counter is input, as the digital value corresponding to the reference value, to the memory.