Test apparatus and method for testing analog/digital converters

Abstract

A method for testing AD converters ( 10 ) may have the steps of a) producing a digital test signal, b) producing an analog test signal as input signal for the AD converter ( 10 ) from the digital test signal, c) producing a sinusoidal, digital reference signal whose frequency is equal to or an integer multiple of the frequency of the analog test signal, d) mixing the test response from the AD converter ( 10 ) with the sine and the cosine of the digital reference signal to form mixed signals, e) determining the DC components of the mixed signals, and f) determining at least one of the parameters including amplitude, power components and phase angle for a fundamental or harmonic of the test response from the DC components of the mixed signals.

1. A test apparatus for testing an analog/digital converter (AD converter), comprising:
 a memory which provides a digital test signal at its output, 
 a digital/analog converter (DA converter) which converts the digital test signal into a sinusoidal analog test signal of frequency ω 0  which is fed to the AD converter to be tested, as a result of which the AD converter to be tested outputs an N-bit digital test response, 
 a frequency converter which takes the digital test signal and produces a sinusoidal m-bit digital reference signal at the frequency Ω, wherein Ω is equal to or an integer multiple of the frequency ω 0 , 
 a frequency selector which contains a phase shifter, two digital multipliers and two digital filters,
 wherein the phase shifter shifts the digital reference signal through π/2, 
 wherein both multipliers respectively have two input channels and an output channel, wherein their first input channel is respectively connected to the digital test response, and wherein the second input channel has the digital reference signal connected to it in the case of the first multiplier and has the output channel from the phase shifter connected to it in the case of the second multiplier, 
 wherein the filters determine and output the DC components of the output signals from the multipliers, 
 
 an evaluation/control unit which receives output signals from the frequency selector. 
 
   
   
     2. The test apparatus according to  claim 1 , wherein the frequency selector contains two squaring elements which multiply the signals at the outputs of the filters by themselves and an adder which adds the signals at the outputs of the squaring elements. 
   
   
     3. The test apparatus according to  claim 1 , wherein the frequency and/or the amplitude and/or the phase of the output signal from the frequency converter is/are set on the basis of the state of a frequency setting channel. 
   
   
     4. The test apparatus according to  claim 1 , comprising a power measurement unit which contains a squaring element which multiplies the digital test response by itself, an averaging element which receives the result of this multiplication and calculates the average therefrom and a connection from the output of the averaging element to one input of the evaluation/control unit. 
   
   
     5. The test apparatus according to  claim 1 , wherein the evaluation/control unit is connected by means of an input to a control channel which is used to control the evaluation/control unit. 
   
   
     6. The test apparatus according to  claim 1 , comprising a multiplicity of frequency converters and a multiplicity of frequency selectors,
 the frequency converters producing a multiplicity of digital reference signals which differ in terms of their frequencies, 
 wherein at least two frequency selectors are connected to various digital reference signals which differ in terms of their frequency. 
 
   
   
     7. The test apparatus according to  claim 1 , wherein an offset compensation section is provided between the output of the AD converter to be tested and the digital test response. 
   
   
     8. The test apparatus according to  claim 7 , comprising an additional measurement circuit comprising:
 a first multiplication element whose input has a digital reference signal applied to it which has the same frequency as the analog test signal and the same amplitude resolution as the AD converter to be tested, and which multiplies the input signal by two, 
 a phase shifter which shifts the output signal from the first multiplication element in the additional measurement circuit through π/2, 
 a second multiplication element which multiplies the output signal from the first multiplication element by the output signal from the first multiplier in a frequency selector, 
 a third multiplication element which multiplies the output signal from the phase shifter by the output signal from the second multiplier in the frequency selector, 
 an adder which forms the sum from the second multiplication element and the third multiplication element, 
 a subtraction element which deducts the output signal from the adder from the test response, 
 a maximum value ascertainment element which ascertains the maximum value of the output signal from the subtraction element. 
 
   
   
     9. The test apparatus according to  claim 1 , wherein the amplitude resolution m of the digital reference signal is greater than the amplitude resolution N of the digital test response. 
   
   
     10. The test apparatus according to  claim 1 , wherein circuits in the test apparatus are integrated in the chip which contains the AD converter to be tested. 
   
   
     11. The test apparatus according to  claim 1 , wherein circuits in the test apparatus are integrated in a field programmable gate array. 
   
   
     12. A method for testing analog/digital converter (AD converters) comprising the steps of:
 a) producing a digital test signal, 
 b) producing an analog test signal as input signal for the AD converter from the digital test signal, 
 c) producing a sinusoidal, digital reference signal whose frequency is equal to or an integer multiple of the frequency of the analog test signal, 
 d) mixing the test response from the AD converter with the digital reference signal and with a digital reference signal shifted through π/2 to form mixed signals, 
 e) determining the DC components of the mixed signals, 
 f) determining at least one of the parameters, selected from the group consisting of amplitude, power component and phase angle, for a fundamental or harmonic of the test response from the DC components of the mixed signals. 
 
   
   
     13. The method according to  claim 12 , wherein in step f) the phase angle of the fundamental of the test response is determined by shifting the phase of the digital reference signal. 
   
   
     14. The method according to  claim 12 , wherein in step f) the phase angle of the fundamental of the test response is obtained by ascertaining the inverse tangent of the quotient of the DC components of the mixed signals. 
   
   
     15. The method according to  claim 12 ,
 wherein in step c) a plurality of digital reference signals at different frequencies are produced, and 
 in step d) a plurality of digital reference signals are simultaneously mixed with the test response. 
 
   
   
     16. The method according to  claim 12 , wherein after step f) the step sequence c), d), e) and f) is repeated at least once, with step c) involving a frequency of the digital reference signal being altered. 
   
   
     17. The method according to  claim 12 , further comprising determining the total power of the test response. 
   
   
     18. The method according to  claim 12 , wherein in a further step values SNR, SINAD, SNDR and THD for the AD converter are ascertained using the parameters ascertained in step f) and the ascertained total power. 
   
   
     19. The method according to  claim 12 , wherein before step f) the offset in the test response is compensated for. 
   
   
     20. The method according to  claim 12 , comprising the following steps:
 a1) producing a further digital reference signal which has the same frequency as the analog test signal and the same amplitude resolution as the AD converter to be tested, 
 b1) multiplying the further reference signal by two, 
 c1) multiplying the DC components of the mixed signals from step e) by the cosine or by the sine of the further reference signal multiplied by two, 
 d1) adding the results of the multiplication operations from step c1), 
 e1) subtracting the result of the addition from step e 1), 
 f1) forming the maximum value of the subtraction result, 
 wherein step a1) takes place after step a) and step c1) takes place after step e).