US7436038B2ExpiredUtilityA1

Visible/near infrared image sensor array

89
Assignee: PHOCUS INC EPriority: Feb 5, 2002Filed: Feb 23, 2004Granted: Oct 14, 2008
Est. expiryFeb 5, 2022(expired)· nominal 20-yr term from priority
H04N 23/71H04N 23/73H04N 25/76H04N 23/11H04N 25/671G01J 5/026G01J 5/02H04N 25/78H04N 25/20H10F 39/8053H10F 39/016H10F 39/014H10F 30/2235H10F 77/1648H10F 77/1645H10F 39/811H10F 39/807H10F 39/803H10F 39/184H10F 39/182H10F 39/026H10F 39/18H10F 30/2823H10F 30/222G01J 5/52G01J 2005/0077G01J 5/046G01J 5/04G01J 5/22Y02E10/545G01J 5/024Y02E10/548
89
PatentIndex Score
50
Cited by
6
References
26
Claims

Abstract

A MOS or CMOS sensor for high performance imaging in broad spectral ranges including portions of the infrared spectral band. These broad spectral ranges may also include portions or all of the visible spectrum, therefore the sensor has both daylight and night vision capabilities. The sensor includes a continuous multi-layer photodiode structure on a many pixel MOS or CMOS readout array where the photodiode structure is chosen to include responses in the near infrared spectral ranges. A preferred embodiment incorporates a microcrystalline copper indium diselenide/cadmium sulfide photodiode structure on a CMOS readout array. An alternate preferred embodiment incorporates a microcrystalline silicon germanium photodiode structure on a CMOS readout array. Each of these embodiments provides night vision with image performance that greatly surpasses the GEN III night vision technology in terms of enhanced sensitivity, pixel size and pixel count. Further advantages of the invention include low electrical bias voltages, low power consumption, compact packaging, and radiation hardness. In special preferred embodiments CMOS stitching technology is used to provide multi-million pixel focal plane array sensors. One embodiments of the invention made without stitching is a two-million pixel sensor. Other preferred embodiments available using stitching techniques include sensors with 250 million (or more) pixels fabricated on a single wafer. A particular application of these very high pixel count sensors is as a focal plane array for a rapid beam steering telescope in a low earth orbit satellite useful for tracking over a 1500-meter wide track with a resolution of 0.3 meter.

Claims

exact text as granted — not AI-modified
1. A MOS or CMOS based visible/near infrared sensor array comprising:
 A) a substrate, 
 B) a plurality of MOS or CMOS pixel circuits fabricated in or on said substrate, each pixel circuit comprising:
 1) a charge collecting electrode for collecting electrical charges and 
 2) a plurality of transistors for monitoring periodically charges collected by said charge collecting electrode, 
 
 C) a continuous un-pixelated photodiode layer of charge generating material located above said pixel circuits for converting into electrical charges electromagnetic radiation in the visible and near infrared spectral ranges, said photodiode layer comprising at least an n-layer, an intrinsic layer and a p-layer, 
 wherein each of the n-layer, the intrinsic layer and the p-layer of the continuous un-pixelated photodiode layer are continuous with no gaps between pixels, and 
 wherein one of said n-layer or said p-layer is adjacent to the charge collecting electrodes in each of the pixel circuits to define a bottom layer; and 
 wherein the bottom layer comprises sufficient carbon to increase its electrical resistance to more than 2×10 7  ohm-cm to minimize pixel-to-pixel crosstalk; and 
 D) a surface electrode in the form of a grid or thin transparent layer located above said layer of charge generating material. 
 
     
     
       2. The sensor as in  claim 1  wherein said charge generating material also converts electromagnetic radiation in ultraviolet spectral ranges into electrical charges. 
     
     
       3. The sensor as in  claim 2  wherein said surface electrode is comprised of indium tin and oxygen. 
     
     
       4. The sensor as in  claim 2  wherein said plurality of pixel circuits in at least 2 million CMOS pixel circuits. 
     
     
       5. The sensor as in  claim 1  wherein one of the said intrinsic layer comprises microcrystalline silicon. 
     
     
       6. The sensor as in  claim 5  wherein said microcrystalline layer is grown using a radio frequency plasma enhanced chemical vapor deposition process. 
     
     
       7. The sensor as in  claim 1  wherein the said intrinsic layer is comprised entirely of microcrystalline silicon. 
     
     
       8. The sensor as in  claim 1  wherein said p-layer is comprised of copper selenium and indium and said n-layer is comprised of cadmium and sulfur. 
     
     
       9. The sensor as in  claim 8  wherein said p-layer also comprises gadolinium. 
     
     
       10. The sensor as in  claim 9  wherein said n-layer is on top of said p-layer. 
     
     
       11. The sensor as in  claim 10  wherein said p-layer is deposited from a four crucible vapor. 
     
     
       12. The sensor as in  claim 1  wherein said photodiode layer comprises geranium. 
     
     
       13. The sensor as in  claim 1  wherein said photodiode layer comprises microcrystalline germanium. 
     
     
       14. The sensor as in  claim 1  wherein said surface electrode is comprised of indium tin and oxygen. 
     
     
       15. The sensor as in  claim 1  wherein said p-layer is located adjacent to said surface electrode. 
     
     
       16. The sensor as in  claim 1  wherein said plurality of pixel circuits in at least 2 million CMOS pixel circuits. 
     
     
       17. The sensor as in  claim 1  wherein said plurality of pixel circuits in at least 100 million CMOS pixel circuits. 
     
     
       18. The sensor as in  claim 1  wherein said pixel circuits are located on a single wafer and are comprised of pixels produced in die spots that are lithographically stitched together to form a unitary pixel array of more than 50 million pixels. 
     
     
       19. The sensor as in  claim 18  wherein said array of more than 50 million pixels is an array of more than 100 million pixels. 
     
     
       20. An array as in  claim 1  and also comprising data analyzing circuits fabricated on said substrate. 
     
     
       21. An array as in  claim 1  wherein said sensor is configured with a Column-Parallel Analog-to Digital architecture. 
     
     
       22. An array as in  claim 1  where said array is a component of a video camera and said array further comprises two 10-bit output ports representing video output from columns and odd columns respectively. 
     
     
       23. An array as in  claim 1  wherein said surface electrode is comprised of a layer of indium tin oxide. 
     
     
       24. An array as in  claim 1  and further comprising an array of color filters located on top of said surface electrode. 
     
     
       25. An array as in  claim 24  wherein said color filters are comprised of red, green and blue filters arranged in four color quadrants of two green, one red and one blue. 
     
     
       26. An array as in  claim 1  wherein said array is a part of a camera incorporated into a device chosen from the following group: Analog camcorder Digital camcorder Security camera Digital still camera Personal computer camera Toy Military unmanned aircraft, bomb and missile Sports equipment High definition television camera Telescope ROBS Telescope.

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