US7463998B2ExpiredUtilityA1

Adaptive design of nanoscale electronic devices

48
Assignee: UNIV SOUTHERN CALIFORNIAPriority: Feb 23, 2006Filed: Feb 9, 2007Granted: Dec 9, 2008
Est. expiryFeb 23, 2026(expired)· nominal 20-yr term from priority
G06F 30/327
48
PatentIndex Score
0
Cited by
13
References
25
Claims

Abstract

A method of fabricating a semiconductor device so as to cause the device to have a desired transfer characteristic. Computations may be performed that predict a transfer characteristic of the semiconductor device for each of a plurality of different sets of values of available control parameters that may be used during the fabrication of the semiconductor device. A set of values of available control parameters that the computations predict will cause the semiconductor device to substantially provide the desired transfer characteristic may be identified, and the semiconductor device may be fabricated based on these identified values.

Claims

exact text as granted — not AI-modified
1. A method of fabricating a semiconductor device so as to cause the device to have a desired electronic response transfer characteristic comprising:
 performing computations that predict an electronic response transfer characteristic of the semiconductor device for each of a plurality of different sets of values of available control parameters that may be used during the fabrication of the semiconductor device; 
 identifying a set of values of available control parameters that the computations predict will cause the semiconductor device to substantially provide the desired electronic response transfer characteristic; and 
 fabricating the semiconductor device based on the set of values of available fabrication control parameters that is identified. 
 
   
   
     2. The method of  claim 1  wherein the electronic response transfer characteristic is an electron transmission characteristic. 
   
   
     3. The method of  claim 1  wherein the electronic response transfer characteristic is a current voltage characteristic. 
   
   
     4. The method of  claim 1  wherein electron motion in the semiconductor device is substantially limited by quantum mechanical transmission. 
   
   
     5. The method of  claim 1  wherein:
 the semiconductor device has a conduction and valence band; 
 at least one of the available control parameters within each set of values relates to the conduction or valence band; and 
 the conduction or valence band is fabricated based on the value of the at least one control parameter within the set of values that is identified. 
 
   
   
     6. The method of  claim 5  wherein each of the sets of values of available control parameters includes varying the local potential in spatial increments across the conduction or valence band. 
   
   
     7. The method of  claim 6  wherein the spatial increments span less than 20 nm. 
   
   
     8. The method of  claim 6  wherein each of the spatial increments are between the thickness of an atomic layer and 20 nm. 
   
   
     9. The method of  claim 6  wherein the spatial increments are substantially equal. 
   
   
     10. The method of  claim 6  wherein the local potentials are selected from a discreet set of values. 
   
   
     11. The method of  claim 1  wherein the computations are derived from a propagation matrix method that solves the Schrödinger equation in a piece-wise fashion. 
   
   
     12. The method of  claim 1  wherein the desired electronic response transfer characteristic of the semiconductor device is for when electron motion in the semiconductor device is not at thermal equilibrium. 
   
   
     13. The method of  claim 12  wherein electron motion in the semiconductor device is substantially limited by quantum mechanical transmission. 
   
   
     14. The method of  claim 1  wherein the desired electronic response transfer characteristic of the semiconductor device is a polynomial function. 
   
   
     15. The method of  claim 14  wherein the polynomial function is a linear function. 
   
   
     16. The method of  claim 14  wherein the polynomial function is a squared function. 
   
   
     17. The method of  claim 1  further comprising determining the sets of values on which computations are performed utilizing optimal design techniques. 
   
   
     18. The method of  claim 1  further comprising fabricating a plurality of the semiconductor devices in accordance with the set of values of available fabrication control parameters that is identified. 
   
   
     19. The method of  claim 1  wherein the semiconductor device is fabricated so as to substantially match the set of values of available control parameters that is identified. 
   
   
     20. The method of  claim 1  wherein the set of values of available control parameters that the computations predict will cause the semiconductor device to most closely provide the desired electronic response transfer characteristic is identified. 
   
   
     21. A semiconductor device that provides an electronic response transfer characteristic that is a linear function when electron motion in the semiconductor device is not at thermal equilibrium. 
   
   
     22. The semiconductor device of  claim 21  wherein the semiconductor device has a conduction and valance band and wherein the conduction or valence band is configured to cause the semiconductor device to provide an electronic response transfer characteristic that is a linear function. 
   
   
     23. A semiconductor device that provides an electronic response transfer characteristic that is a squared function when electron motion in the semiconductor device is not at thermal equilibrium. 
   
   
     24. The semiconductor device of  claim 23  wherein the semiconductor device has a conduction and valence band and wherein the conduction or valence band is configured to cause the semiconductor device to provide an electronic response transfer characteristic that is a squared function. 
   
   
     25. A semiconductor device made by the process recited in  claim 1 .

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