Multilayered printed circuit board

Abstract

A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.

1. A multilayered printed circuit board comprising:
 a first surface layer that includes a semiconductor integrated circuit; 
 a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided; 
 a main power supply wiring layer that is provided in a layer between the first and second surface layers; and 
 a ground layer that is provided in a layer between the first and second surface layers, 
 wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit. 
 
   
   
     2. A multilayered printed circuit board comprising:
 a first surface layer that includes a semiconductor integrated circuit; 
 a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided; 
 a main power supply wiring layer that is provided in a layer between the first and second surface layers; and 
 a ground layer that is provided in a layer between the first and second surface layers, 
 wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an inductance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than a parasitic inductance in the bypass capacitor.