D/A converter circuit, organic EL drive circuit and organic EL display device

Abstract

A current mirror type D/A converter circuit is constructed with transistor cells each including a MOS transistor, a gate region of which MOS transistor has folded stripe configuration in a plan view thereof, or a current flowing direction in a channel of which is a folded stripe in plan view.

1. An organic EL drive circuit comprising:
 a D/A converter circuit including a current mirror circuit, wherein said current mirror circuit including a plurality of transistor cells, each said transistor cell including a first MOS transistor; 
 wherein said transistor cells comprise a series circuit of said first MOS transistor and a second transistor operable as a switch circuit; 
 wherein said first MOS transistors is a serpentine MOS transistor, said second transistor operable as the switch circuit is a second MOS transistor and said serpentine MOS transistor and said second MOS transistor are formed in a rectangular region in plan view; 
 wherein said transistor cells are assigned as input side transistor cell of said current mirror circuit and a plurality of output side transistor cells of said current mirror circuit, said transistors operable as switch circuits of the plurality of said output side transistor cells being turned ON/OFF in response to 1 bit of display data supplied to gates thereof to generate analog current obtained by D/A conversion of the display data as a total output of said output side transistor cells; 
 wherein the analog current is an output current to be supplied to terminal pins of an organic EL display panel or a base current on which the output current is generated: 
 wherein said transistor cell is selected from transistor cells arranged in a matrix in a rectangular transistor arranging block; and 
 wherein said rectangular transistor arranging block has a width in a pad arranging direction substantially corresponding to 3n times a pad pitch in the pad arranging direction, where n is a positive integer, 4 or more of said transistor cells are arranged for the width, a number of said transistor cells are arranged in a direction perpendicular to the pad arranging direction, said transistor cells are selected such that said D/A converter circuits for R, G and B in said transistor arranging block are sequentially formed in a direction perpendicular to said pad arranging direction as an IC. 
 
   
   
     2. An organic EL display device comprising:
 a D/A converter circuit including a current mirror circuit and an organic EL display panel having terminal pins supplied with analog currents converted by said D/A converter circuit or a drive current generated on the basis of the analog current, 
 wherein said current mirror circuit includes a plurality of transistor cells, each said transistor cell including a first MOS transistor, 
 wherein said transistor cells comprises a series circuit of said first MOS transistor and a transistor operable as a switch circuit; 
 wherein said first MOS transistor is a serpentine MOS transistor, said transistor is operable as the switch circuit is a second MOS transistor and said serpentine MOS transistor and said second MOS transistor are formed in a rectangular region in plan view; 
 wherein said transistor cells are assigned as input side transistor cell of said current mirror circuit and a plurality of output side transistor cells of said current mirror circuit, said transistors operable as switch circuits of the plurality of said output side transistor cells are turned ON/OFF in response to 1 bit of a display data supplied to gates thereof to generate analog current obtained by D/A conversion of the display data as a total output of said output side transistors; 
 wherein said transistor cell is selected from transistor cells arranged in a matrix in a rectangular transistor arranging block; and 
 wherein said rectangular transistor arranging block has a width in a pad arranging direction substantially corresponding to 3n times a pad pitch in the pad arranging direction, where n is a positive integer, 4 or more of said transistor cells are arranged for the width, a number of said transistor cells are arranged in a direction perpendicular to the pad arranging direction, said transistor cells are selected such that said D/A convener circuits for R, G and B in said transistor arranging block are sequentially formed in a direction perpendicular to said pad arranging direction as an IC.