P
US7486559B2ExpiredUtilityPatentIndex 83

Non-volatile semiconductor memory device

Assignee: TOSHIBA KKPriority: Apr 26, 2006Filed: Apr 26, 2007Granted: Feb 3, 2009
Est. expiryApr 26, 2026(expired)· nominal 20-yr term from priority
Inventors:MOROOKA MIDORIFUKUDA KOICHI
G11C 16/0483G11C 16/20
83
PatentIndex Score
9
Cited by
8
References
11
Claims

Abstract

2 or more sets of initial setup data specifying different operation conditions are stored in a memory cell array comprising electrically-rewritable non-volatile memory cells arranged therein. A control circuit reads a set of initial setup data out of the 2 or more sets of initial setup data via an sense amplifier circuit based on the area information. The initial setup data is transferred to an initial setup data latch and stored therein.

Claims

exact text as granted — not AI-modified
1. A non-volatile semiconductor memory device comprising:
 a memory cell array comprising electrically-rewritable non-volatile memory cells arranged, and including areas storing two or more sets of initial setup data specifying different operation conditions; 
 a sense amplifier detecting data in the memory cell array; 
 an initial setup data latch where initial setup data read from the memory cell array via the sense amplifier is transferred therein and stored therein; and 
 a control circuit controlling reading one set of initial setup data out of the two or more sets of initial setup data based on area information selecting at least one set of initial setup data. 
 
   
   
     2. The non-volatile semiconductor memory device according to  claim 1 , further comprising a selection pin inputting the area information into the control circuit. 
   
   
     3. The non-volatile semiconductor memory device according to  claim 1 , further comprising input pins used to input data, an address, or a command,
 wherein the area information is input from at least one of the input pins. 
 
   
   
     4. The non-volatile semiconductor memory device according to  claim 1 , wherein the area information is stored in the memory cell array, and is read at the time when a power supply is turned on. 
   
   
     5. The non-volatile semiconductor memory device according to  claim 1 , wherein the area information is input into the control circuit by inputting a command from outside. 
   
   
     6. The non-volatile semiconductor memory device according to  claim 1 , wherein the initial setup data includes initial setup data for two-value cells storing 1-bit data per one cell, and initial setup data for multi-value cells storing data of 2 bits or more per one cell. 
   
   
     7. The non-volatile semiconductor memory device according to  claim 1 ,
 wherein the initial setup data includes two or more different sets of initial setup data that are specified based on a speed of writing, erasing and reading operation, and a reliability of data. 
 
   
   
     8. The non-volatile semiconductor memory device according to  claim 1 , wherein each of 2 or more sets of the initial setup data is stored in a different page in the memory cell array. 
   
   
     9. The non-volatile semiconductor memory device according to  claim 1 , wherein two or more sets of the initial setup data includes:
 first initial setup data providing a first writing speed and a first reliability of data; and 
 second initial setup data providing a second writing speed and a second reliability of data. 
 
   
   
     10. The non-volatile semiconductor memory device according to  claim 1 , wherein two or more sets of the initial setup data includes:
 first initial setup data providing a first guaranteed number of data rewriting and a first reliability of data; and 
 second initial setup data providing a second guaranteed number of data rewriting and a second reliability of data. 
 
   
   
     11. The non-volatile semiconductor memory device according to  claim 8 , wherein the area information is stored in a page different from a page storing the initial setup data.

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