Systems and methods for resistance compensation in a temperature measurement circuit

Abstract

Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide methods for temperature measurement that include exciting a provided transistor with at least four sequential input signals of different magnitudes. In response, the transistor exhibits a sequence of output signals corresponding to the four sequential input signals. The sequence of output signals is sensed using a different gain for each of the output signals included in the sequence of output signals, and the output signals included in the sequence of output signals are combined such that the combined output signals eliminates a resistance error. The combined output signals are then used to calculate a temperature of the transistor.

1. A method for resistance compensated temperature measurement, the method comprising:
 providing a diode connected transistor; 
 applying a first current to the diode connected transistor, wherein a first base-emitter voltage corresponding to the first current is exhibited by the diode connected transistor; 
 applying a second current to the diode connected transistor, wherein a second base-emitter voltage corresponding to the second current is exhibited by the diode connected transistor; 
 applying a third current to the diode connected transistor, wherein a third base-emitter voltage corresponding to the third current is exhibited by the diode connected transistor; 
 applying a fourth current to the diode connected transistor, wherein a fourth base-emitter voltage corresponding to the fourth current is exhibited by the diode connected transistor; and 
 combining the first base-emitter voltage, the second base emitter voltage, the third base-emitter voltage and the fourth base emitter voltage, wherein a resistance error is eliminated. 
 
   
   
     2. The method of  claim 1 , wherein the method further comprises:
 providing an analog to digital converter, wherein the analog to digital converter is electrically coupled to the diode connected transistor, wherein the analog to digital converter is configurable to operate at a first gain, a second gain, a third gain, and a fourth gain; 
 sampling the first base-emitter voltage, wherein the analog to digital converter is configured to select the first gain in association with sampling the first base-emitter voltage; 
 sampling the second base-emitter voltage, wherein the analog to digital converter is configured to select the second gain in association with sampling the second base-emitter voltage; 
 sampling the third base-emitter voltage, wherein the analog to digital converter is configured to select the third gain in association with sampling the third base-emitter voltage; and 
 sampling the fourth base-emitter voltage, wherein the analog to digital converter is configured to select the fourth gain in association with sampling the fourth base-emitter voltage. 
 
   
   
     3. The method of  claim 2 , wherein combining the first base-emitter voltage, the second base emitter voltage, the third base-emitter voltage and the fourth base emitter voltage includes integrating all of the first base-emitter voltage, the second base-emitter voltage, the third base emitter voltage and the fourth base emitter voltage. 
   
   
     4. The method of  claim 2 , wherein the analog to digital converter includes a differential operational amplifier, a differential comparator, and a result counter. 
   
   
     5. The method of  claim 4 , wherein the base of the transistor is electrically coupled to a first input of the differential operational amplifier via a first input circuit and to a second input of the differential operational amplifier via a second input circuit, and wherein the emitter of the transistor is electrically coupled to the first input of the differential operational amplifier via a third input circuit and to the second input of the differential operational amplifier via a fourth input circuit. 
   
   
     6. The method of  claim 5 , wherein the first input circuit and the third input circuit share a first gain circuit, wherein the first gain circuit includes a first selectable capacitance and a second selectable capacitance, wherein the second input circuit and the fourth input circuit share a second gain circuit, and wherein the second gain circuit includes a third selectable capacitance and a fourth selectable capacitance. 
   
   
     7. The method of  claim 6 , wherein configuring the analog to digital converter to select the first gain and configuring includes selecting the first selectable capacitance of the first gain circuit and selecting the third selectable capacitance of the second gain circuit, and wherein configuring the analog to digital converter to select the second gain includes selecting the second selectable capacitance of the first gain circuit and selecting the fourth selectable capacitance of the second gain circuit. 
   
   
     8. The method of  claim 2 , wherein the first gain is the same magnitude as the fourth gain, and wherein the second gain is the same magnitude as the third gain. 
   
   
     9. The method of  claim 8 , wherein the first gain is a negative gain, wherein the second gain is a positive gain, wherein the third gain is a negative gain, and wherein the fourth gain is a positive gain. 
   
   
     10. The method of  claim 9 , wherein the magnitude of the first current is two times the magnitude of the second current, wherein the magnitude of the fourth current is two times the magnitude of the third current, and wherein the magnitude of the second current is ten times the magnitude of the third current. 
   
   
     11. A temperature measurement system, wherein the temperature measurement system comprises:
 a transistor; 
 a variable current source; wherein the variable current source is electrically coupled to the transistor; wherein the variable current source is operable to provide a first current, a second current, a third current and a fourth current; wherein the first current produces a first base-emitter voltage on the transistor; wherein the second current produces a second base-emitter voltage on the transistor; wherein the third current produces a third base-emitter voltage on the transistor; and wherein the fourth current produces a fourth base-emitter voltage on the transistor; and 
 an analog to digital converter, wherein the analog to digital converter is operable sample and integrate the first base-emitter voltage while applying a first gain, wherein the analog to digital converter is operable sample and integrate the second base-emitter voltage while applying a second gain, wherein the analog to digital converter is operable sample and integrate the third base-emitter voltage while applying a third gain, wherein the analog to digital converter is operable sample and integrate the fourth base-emitter voltage while applying a fourth gain, and wherein the analog to digital converter is operable to provide an integrated output combining the first base-emitter voltage, the second base emitter voltage, the third base emitter voltage and the fourth base emitter voltage. 
 
   
   
     12. The system of  claim 11 , wherein a magnitude of the first current, a magnitude of the second current, a magnitude of the third current, a magnitude of the fourth current, a sign and magnitude of the first gain, a sign and magnitude of the second gain, a sign and magnitude of the third gain, and a sign and magnitude of the fourth gain are selected such that a resistance error is eliminated from the integrated output. 
   
   
     13. The system of  claim 11 , wherein the analog to digital converter includes a differential operational amplifier, a differential comparator, and a result counter. 
   
   
     14. The system of  claim 13 , wherein the base of the transistor is electrically coupled to a first input of the differential operational amplifier via a first input circuit and to a second input of the differential operational amplifier via a second input circuit, and wherein the emitter of the transistor is electrically coupled to the first input of the differential operational amplifier via a third input circuit and to the second input of the differential operational amplifier via a fourth input circuit. 
   
   
     15. The system of  claim 14 , wherein the first input circuit and the third input circuit share a first gain circuit, wherein the first gain circuit includes a first selectable capacitance and a second selectable capacitance, wherein the second input circuit and the fourth input circuit share a second gain circuit, and wherein the second gain circuit includes a third selectable capacitance and a fourth selectable capacitance. 
   
   
     16. The system of  claim 15 , wherein configuring the analog to digital converter to select the first gain and configuring includes selecting the first selectable capacitance of the first gain circuit and selecting the third selectable capacitance of the second gain circuit, and wherein configuring the analog to digital converter to select the second gain includes selecting the second selectable capacitance of the first gain circuit and selecting the fourth selectable capacitance of the second gain circuit. 
   
   
     17. A method for performing temperature measurements, the method comprising:
 providing a transistor; 
 exciting the transistor with at least four sequential input signals of different magnitudes, wherein the transistor exhibits a sequence of output signals corresponding to the four sequential input signals; 
 sensing the sequence of output signals using a different gain for each of the output signals included in the sequence of output signals; 
 combining the sequence of output signals to produce a combined output, wherein combining the sequence of output signals eliminates a resistance error. 
 
   
   
     18. The method of  claim 17 , wherein the transistor is a diode connected bipolar transistor, and wherein the sequence of output signals are base-emitter voltages of the diode connected bipolar transistor. 
   
   
     19. The method of  claim 18 , wherein the diode connected bipolar transistor is selected from a group consisting of: an NPN device, and a PNP device. 
   
   
     20. The method of  claim 17 , wherein the method further comprises:
 determining the temperature of the transistor based at least in part on the combined output.