P
US7525407B2ExpiredUtilityPatentIndex 83

Integrated circuit having integrated inductors

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Feb 15, 2005Filed: Feb 15, 2006Granted: Apr 28, 2009
Est. expiryFeb 15, 2025(expired)· nominal 20-yr term from priority
Inventors:LEE KWANG DUEO YUN-SEONGBANG HEE-MUNLEE SEONG-SOOJUNG SUNG-JAELEE HEUNG-BAE
A47K 2010/3233A47K 10/42A47K 10/32H01F 17/0006H01F 2017/0046H10W 20/497
83
PatentIndex Score
17
Cited by
13
References
9
Claims

Abstract

An integrated circuit having integrated inductors includes at least one pair of transistors, and at least one inductor group which includes a pair of inductors coupled to the at least one pair of the transistor, respectively. The pair of the inductors form a spiral shape on a plane and the inductors arranged symmetrically to each other. Magnetic fluxes, which are generated by current flows along the inductors of the at least one inductor group, are formed in a direction to mutually intensify the magnetic fluxes according to differential signals applied to the at least one transistors from outside. Accordingly, high inductance and high quality factor can be attained owing to the positive magnetic coupling of the inductors.

Claims

exact text as granted — not AI-modified
1. An integrated circuit comprising:
 at least one pair of transistors; 
 at least one inductor group which includes a pair of inductors coupled to the at least one pair of transistors, respectively, the pair of inductors forming a spiral shape on a plane and the inductors arranged symmetrically to each other; and 
 at least one pair of differential signal input terminals which are coupled to the at least one pair of transistors and to which differential signals are applied from the outside, 
 wherein magnetic fluxes, which are generated by current flows along the inductors of the at least one inductor group, are formed in a direction to mutually intensify the magnetic fluxes according to the differential signals applied to the at least one pair of transistors via the at least one pair of differential signal input terminals, and 
 wherein the at least one inductor group is at least one of a first inductor group which is coupled to gate terminals of the at last one pair of transistors with one end, a second inductor group which is coupled to source terminals of the at least one pair of transistors with one end, and a third inductor group which is coupled to drain terminals of the at least one pair of transistor with one end. 
 
   
   
     2. The integrated circuit of  claim 1 , wherein the at least one inductor group comprises:
 a first inductor; and 
 a second inductor which is arranged symmetrically to the first inductor based on a certain virtual line on the plane. 
 
   
   
     3. The integrated circuit of  claim 2 , wherein the first inductor and the second inductor intersect perpendicularly to each other with a spacing from the certain virtual line on the plane. 
   
   
     4. An integrated circuit comprising:
 at least one pair of transistors; 
 at least one inductor group which includes a pair of inductors coupled to the at least one pair of transistors, respectively, the pair of inductors forming a spiral shape on a plane and the inductors arranged symmetrically to each other; and 
 at least one pair of differential signal input terminals which are coupled to the at least one pair of transistors and to which differential signals are applied from the outside, 
 wherein magnetic fluxes, which are generated by current flows along the inductors of the at least one inductor group, are formed in a direction to mutually intensify the magnetic fluxes according to the differential signals applied to the at least one pair of transistors via the at least one pair of differential signal input terminals, and 
 wherein the at least one inductor group comprises: 
 a first inductor group which surrounds the pair of the transistors in a spiral shape; 
 a second inductor group which surrounds the first inductor group at an interval; and 
 a third inductor group which surrounds the second inductor group at an interval. 
 
   
   
     5. The integrated circuit of  claim 1 , wherein the at least one pair of transistors is arranged in a center of the at least one inductor group. 
   
   
     6. The integrated circuit of  claim 1 , wherein the symmetry between the pair of inductors is a mirror symmetry. 
   
   
     7. The integrated circuit of  claim 1 , wherein the at least one inductor group is coupled to the at least one group of transistors on one end and coupled to the at least one pair of differential signal input terminals on the other end. 
   
   
     8. The integrated circuit of  claim 1 , further comprising a pair of differential signal output terminals coupled to the at least one pair of transistors. 
   
   
     9. An integrated circuit comprising:
 at least one pair of transistors; 
 at least one inductor group which includes a pair of inductors coupled to the at least one pair of transistors, respectively, the pair of inductors forming a spiral shape on a plane and the inductors arranged symmetrically to each other; and 
 means for controlling the direction of current flow along the at least one inductor group so as to mutually intensify magnetic fluxes generated by the current according to differential signals applied to the at least one pair of transistors from outside, 
 wherein the at least one inductor group is at least one of a first inductor group which is coupled to gate terminals of the at last one pair of transistors with one end, a second inductor group which is coupled to source terminals of the at least one pair of transistors with one end, and a third inductor group which is coupled to drain terminals of the at least one pair of transistor with one end.

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