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US7531902B2ActiveUtilityPatentIndex 63

Multi-layered metal line of semiconductor device having excellent diffusion barrier and method for forming the same

Assignee: HYNIX SEMICONDUCTOR INCPriority: Dec 28, 2006Filed: May 31, 2007Granted: May 12, 2009
Est. expiryDec 28, 2026(~0.5 yrs left)· nominal 20-yr term from priority
Inventors:KIM JEONG-TAEKIM BAEK MANNKIM SOO HYUNLEE YOUNG JINJUNG DONG HA
H10W 20/425H10W 20/048H10W 20/033H10W 20/035H10P 14/40
63
PatentIndex Score
2
Cited by
7
References
27
Claims

Abstract

A multi-layered metal line of a semiconductor device has a lower metal line and an upper metal line. The upper metal line includes a diffusion barrier, which is made of a stack of a first WN x layer, a WC y N x layer and a second WN x layer.

Claims

exact text as granted — not AI-modified
1. A multi-layered metal line of a semiconductor device comprising:
 a lower metal line; 
 an upper metal line; and 
 a diffusion barrier formed between the lower and upper metal lines, wherein the diffusion barrier comprises a stack of a first WN x  layer, a WC y N x  layer, and a second WN x  layer. 
 
     
     
       2. The multi-layered metal line according to  claim 1 , wherein the first WN x  layer has a thickness of 10˜200 Å. 
     
     
       3. The multi-layered metal line according to  claim 1 , wherein the composition ratio x in the first WN x  layer is in the range of 0.1˜10. 
     
     
       4. The multi-layered metal line according to  claim 1 , wherein the WC y N x  layer has a thickness of 5˜50 Å. 
     
     
       5. The multi-layered metal line according to  claim 1 , wherein the second WN x  layer has a thickness of 10˜200 Å. 
     
     
       6. A method for forming a diffusion barrier layer to prevent diffusion of a metal line in a semiconductor device formed with a multi-layered metal line structure, the method for forming a diffusion barrier comprising the steps of:
 depositing a first WN x  layer; 
 surface-treating the first WN x  layer; and 
 depositing a second WN x  layer on the surface-treated first WN x  layer, 
 wherein the step of surface-treating the first WN x  layer comprises the step of: forming a WC y N x  layer on a surface of the first WN x  layer through an heat treatment plasma treatment under high temperature using a hydrocarbon-based source gas. 
 
     
     
       7. The method according to  claim 6 , wherein the first WN x  layer is formed in a CVD or ALD process. 
     
     
       8. The method according to  claim 6 , wherein the first WN x  layer is formed to a thickness of 10˜200 Å. 
     
     
       9. The method according to  claim 6 , wherein the composition ratio x in the first WN x  layer is 0.1˜10. 
     
     
       10. The method according to  claim 6 , wherein the hydrocarbon-based gas is CH 3  or C 2 H 5  gas. 
     
     
       11. The method according to  claim 6 , wherein the plasma treatment is implemented under an atmosphere of CH 3  or C 2 H 5  at a temperature of 200˜500° C.; a pressure of 1˜100 torr, and an RF power of 0.1˜1 kW. 
     
     
       12. The method according to  claim 6 , wherein the WC y N x  layer is formed to a thickness of 5˜50 Å. 
     
     
       13. The method according to  claim 6 , wherein the second WN x  layer is formed in a CVD or ALD process. 
     
     
       14. The method according to  claim 6 , wherein the second WN x  layer is formed to a thickness of 10˜200 Å. 
     
     
       15. A method for forming a multi-layered metal line of a semiconductor device, comprising the steps of:
 forming an interlayer dielectric layer on a semiconductor substrate, the interlayer dielectric layer having a damascene pattern for defining a metal line forming region; 
 depositing a first WN x  layer on the interlayer dielectric layer including the damascene pattern; 
 surface-treating the first WN x  layer; 
 depositing a second WN x  layer on the surface-treated first WN x  layer so as to form a diffusion barrier comprising the surface-treated first WN x  layer and the second WN x  layer; and 
 forming a wiring metal layer on the diffusion barrier to fill the damascene pattern, 
 wherein the step of surface-treating the first WN x  layer comprises the step of: forming a WC y N x  layer on a surface of the first WN x  layer through an heat treatment or plasma treatment under high temperature using a hydrocarbon-based source gas. 
 
     
     
       16. The method according to  claim 15 , wherein the damascene pattern is a single type or a dual type. 
     
     
       17. The method according to  claim 16 , wherein the single type damascene pattern has a trench. 
     
     
       18. The method according to  claim 16 , wherein the dual type damascene pattern has a via hole and a trench. 
     
     
       19. The method according to  claim 15 , wherein the first WN x  layer is formed in a CVD orALD process. 
     
     
       20. The method according to  claim 15 , wherein the first WN x  layer is formed to a thickness of 10˜200 Å. 
     
     
       21. The method according to  claim 15 , wherein the composition ratio x in the first WN x  layer is 0.1˜10. 
     
     
       22. The method according to  claim 15 , wherein the hydrocarbon-based gas is CH 3  or C 2 H 5  gas. 
     
     
       23. The method according to  claim 15 , wherein the plasma treatment is implemented under an atmosphere of CH 3  or C 2 H 5  at a temperature of 200˜500° C., a pressure of 1˜100 torr, and an RF power of 0.1˜1 kW. 
     
     
       24. The method according to  claim 15 , wherein the WC y N x  layer is formed to a thickness of 5˜50 Å. 
     
     
       25. The method according to  claim 15 , wherein the second WN x  layer is formed in a CVD or ALD process. 
     
     
       26. The method according to  claim 15 , wherein the second WN x  layer is formed to a thickness of 10˜200 Å. 
     
     
       27. The method according to  claim 15 , wherein the wiring metal layer is made of a copper layer.

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