P
US7542357B2ExpiredUtilityPatentIndex 74

Semiconductor device

Assignee: HITACHI LTDPriority: May 28, 2003Filed: Apr 18, 2007Granted: Jun 2, 2009
Est. expiryMay 28, 2023(expired)· nominal 20-yr term from priority
Inventors:SAKATA TAKESHIOSADA KENICHITAKEMURA RIICHIROMATSUOKA HIDEYUKI
G11C 2213/79G11C 13/0069G11C 8/10G11C 13/0004G11C 8/06
74
PatentIndex Score
6
Cited by
17
References
3
Claims

Abstract

A phase change memory is provided with a write data register, an output data selector, a write address register, an address comparator and a flag register. Write data is not only written into a memory cell but also retained by the write data register until the next write cycle. If a read access occurs to that address before the next write cycle, data is read out from the register without reading the data from the memory cell array. Without elongating the cycle time, it is possible not only to use a long time to write data into a memory cell therein but also to make longer the interval between the time when a write operation is done and the time when the subsequent read operation is made from that memory cell. As a result, data can be written reliably.

Claims

exact text as granted — not AI-modified
1. A memory card comprising:
 a phase change memory cell array including a plurality of first word lines, a plurality of first bit lines intersected with the plurality of first word lines, and a plurality of phase change memory cells arranged at respective positions where the plurality of first word lines are intersected with the plurality of first bit lines; 
 a flash memory cell array including a plurality of second word lines, a plurality of second bit lines intersected with the plurality of second word lines, and a plurality of non-volatile memory cells arranged at respective positions where the plurality of second word lines are intersected with the plurality of second bit lines; and 
 a memory controller connected to the phase change memory cell array and the flash memory cell array, 
 wherein the memory controller controls the flash memory cell array and uses the phase change memory cell array as a buffer memory cell array of the flash memory cell array. 
 
     
     
       2. A memory card according to  claim 1 , wherein data held in the phase change memory cell array is transferred to the flash memory cell array. 
     
     
       3. A memory card according to  claim 1 , wherein the memory card holds data in the phase change memory cell array before writing the data into the flash memory cell array, even if a power supply to the memory card is cut off.

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