P
US7638405B2ExpiredUtilityPatentIndex 63

High voltage sensor device

Assignee: SEMICONDUCTOR COMPONENTS INDPriority: Jan 25, 2005Filed: Oct 26, 2007Granted: Dec 29, 2009
Est. expiryJan 25, 2025(expired)· nominal 20-yr term from priority
Inventors:HALL JEFFERSON WQUDDUS MOHAMMED TANVIR
H10D 30/603A47J 33/00H03K 17/102H02M 1/36A47J 36/26H02M 1/32H10D 62/127H10D 89/911H10D 62/307H10D 64/115H02M 1/0022
63
PatentIndex Score
3
Cited by
6
References
13
Claims

Abstract

In one embodiment, a high voltage element is formed overlying a doped semiconductor region that can be depleted during the operation of the high voltage element.

Claims

exact text as granted — not AI-modified
1. A method of sensing a high voltage comprising:
 providing a semiconductor substrate; 
 forming a doped region on the semiconductor substrate; 
 forming a sense element overlying a portion of the semiconductor substrate and overlying a portion of the doped region; and 
 configuring the sense element to receive a high voltage having a value that is greater than approximately forty volts and responsively form a sense signal having a value that is representative of the value of the high voltage and varies in a continuous manner over an operating range of the value of the high voltage wherein a first terminal of the sense element is not coupled to the doped region. 
 
     
     
       2. The method of  claim 1  wherein forming the sense element includes forming a resistor that receives the high voltage on the first terminal and forms the sense signal on a second terminal of the resistor. 
     
     
       3. The method of  claim 1  wherein forming the sense element overlying the portion of the semiconductor substrate includes forming a insulator overlying a portion of the doped region and forming the sense element overlying a portion of the insulator. 
     
     
       4. The method of  claim 3  wherein forming the insulator includes forming the sense element overlying a portion of a transistor. 
     
     
       5. The method of  claim 1  wherein forming the sense element includes forming the sense element overlying a portion of a J-FET. 
     
     
       6. The method of  claim 1  wherein forming the sense element overlying the portion of the semiconductor substrate includes configuring the sense element to receive the high voltage that is greater than one hundred volts. 
     
     
       7. The method of  claim 1  wherein forming the sense element overlying the portion of the semiconductor substrate includes configuring the sense element to receive the high voltage that is greater than four hundred volts. 
     
     
       8. The method of  claim 1  wherein configuring the sense element to receive the high voltage having the value that is greater than approximately forty volts and responsively form the sense signal includes configuring the sense element to form one of a voltage having a value that is representative of the high voltage or a current having a value that is representative of the high voltage. 
     
     
       9. A method of sensing a high voltage comprising:
 providing a semiconductor substrate; 
 forming a doped region on the semiconductor substrate; 
 forming a sense element overlying at least a portion of the doped region; and 
 configuring the sense element to receive a high voltage having a value that is greater than approximately forty volts and responsively form a sense signal having a value is representative of the value of the high voltage wherein one terminal of the sense element is not connected to the doped region. 
 
     
     
       10. The method of  claim 9  further including configuring the sense element to form the sense signal to vary in a continuous manner over an operating range of the value of the high voltage. 
     
     
       11. The method of  claim 9  further including forming an insulator overlying the doped region and positioned between a resistor and the doped region. 
     
     
       12. The method of  claim 9  wherein forming the doped region includes forming the doped region as a portion of a JFET. 
     
     
       13. The method of  claim 9  further including coupling a circuit to receive the high voltage commonly with the sense element and responsively provide a current.

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