Integrated circuit for in-system signal monitoring

Abstract

In-system signal monitoring using an integrated circuit such as a programmable logic device is described. An analog-to-digital converter is disposed in the programmable logic device. A sampling bridge is coupled to provide an analog input to the analog-to-digital converter and to receive first signaling of a first frequency. A signal generator is configured to provide second signaling at a second frequency which is a fraction of the first frequency. Sample window circuitry is coupled to receive the second signaling and configured to provide third signaling to the sampling bridge at least partially responsive to the second signaling and at least partially responsive to an adjustable impedance setting of the sample window circuitry. The sample window circuitry is configured to provide an adjustable sample window within a pulse-width range.

1. A system for in-system monitoring of signals, comprising:
 an analog-to-digital converter disposed in an integrated circuit (IC); 
 a sampling bridge coupled to provide an analog input to the analog-to-digital converter, the sampling bridge coupled to receive first signaling of a first frequency and being internal to the integrated circuit; 
 a signal generator configured to provide second signaling at a second frequency, the second frequency being a fraction of the first frequency; 
 sample window circuitry coupled to receive the second signaling and configured to provide third signaling to the sampling bridge at least partially responsive to the second signaling and at least partially responsive to an adjustable impedance setting of the sample window circuitry; and 
 the sample window circuitry configured to provide an adjustable sample window within a pulse-width range; 
 wherein the sampling bridge is located within a multi-gigabit transceiver of the IC, or the IC includes a multi-gigabit transceiver coupled to the sampling bridge. 
 
     
     
       2. The system according to  claim 1 , wherein the sample window circuitry is at least partially internal to the IC. 
     
     
       3. The system according to  claim 1 , wherein the first signaling is a first differential signal pair, and wherein the third signaling is a second differential signal pair. 
     
     
       4. The system according to  claim 3 , wherein the first signaling is gigahertz differential signaling, and wherein the second signaling is kilohertz differential signaling. 
     
     
       5. The system according to  claim 4 , wherein the pulse-width range is approximately 20 to 100 picoseconds. 
     
     
       6. The system according to  claim 1 , wherein a receiver portion of the multi-gigabit transceiver is coupled to receive the first signaling. 
     
     
       7. The system according to  claim 1 , wherein a transmitter portion of the multi-gigabit transceiver is coupled to provide the first signaling responsive to fourth signaling provided from the signal generator at the first frequency. 
     
     
       8. The system according to  claim 7 , wherein the first signaling is a first differential signal pair provided responsive to the fourth signaling, wherein the third signaling is a second differential signal pair provided responsive to the second signaling, and wherein the second signaling and the fourth signaling are respective single reference signals generated internal to the IC. 
     
     
       9. The system according to  claim 8 , wherein the IC includes a microprocessor for signal processing of samples sampled with the adjustable sample window, the microprocessor being one of an embedded microprocessor in the IC, an instantiated microprocessor in a programmable logic of the IC, or an external microprocessor coupled to the IC. 
     
     
       10. A method for in-system monitoring of signals, comprising:
 providing an integrated circuit; 
 while operating the integrated circuit,
 generating within the integrated circuit a first reference signal having a first frequency; 
 converting the first reference signal into a first differential signal, the first differential signal having an adjustable pulse width; 
 obtaining a second differential signal having a second frequency, the first frequency being a fraction of the second frequency; 
 sampling the second differential signal responsive to the pulse width of the first differential signal to provide a signal sample as a first analog signal; 
 converting the first analog signal to a first digital signal in the integrated circuit; 
 adjusting the pulse width of the first differential signal to obtain another signal sample to provide a second analog signal; 
 multiplexing the first analog signal and the second analog signal; 
 selecting the second analog signal for output from the multiplexing; and 
 converting the second analog signal selected to a second digital signal in the integrated circuit; 
 wherein the first analog signal and the second analog signal are respectively associated with different communication channels. 
 
 
     
     
       11. The method according to  claim 10 , further comprising:
 generating within the integrated circuit a second reference signal; and 
 providing the second differential signal responsive to the second reference signal. 
 
     
     
       12. The method according to  claim 10 , wherein the second differential signal is gigahertz differential signaling, and wherein the first differential signal is kilohertz differential signaling. 
     
     
       13. The method according to  claim 10 , wherein the first analog signal is associated with a transmission channel, and wherein the second analog signal is associated with a reception channel.