Image display device and driving method thereof

Abstract

An occupying area of a digital system signal line driver circuit in an image display device is large and this hinders the miniaturization of the display device. A memory circuit and a D/A converter circuit in the signal line driver circuit are commonly used for n (“n” is a natural number equal to or larger than 2) signal lines. One horizontal scanning period is divided into n periods and the memory circuit and the D/A converter circuit each perform processing for different signal lines during each of the divided periods. Thus, all the signal lines can be driven. Therefore, the number of memory circuits and the number of D/A converter circuits in the signal line driver circuit can be reduced to one n-th in a conventional case.

1. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; and 
 an order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       2. A device according to  claim 1  wherein each of the signal line selection circuits has an analog switch and the order for selecting the n×k signal lines is determined by a selection signal input to the analog switch. 
     
     
       3. A device according to  claim 1  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       4. A device according to  claim 1  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       5. An electronic equipment using a device as claimed in  claim 1 . 
     
     
       6. The image display device according to  claim 1 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the order is transmitted from the register to the selection signal generating circuit, and 
 the data for the order is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       7. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 orders for selecting the n×k signal lines are different from each other between successively produced horizontal scanning periods; and 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller. 
 
 
     
     
       8. A device according to  claim 7  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       9. A device according to  claim 7  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       10. An electronic equipment using a device as claimed in  claim 7 . 
     
     
       11. The image display device according to  claim 7 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the orders is transmitted from the register to the selection signal generating circuit, and 
 the data for the orders is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       12. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 orders for selecting the n×k signal lines are different from each other between successively produced horizontal scanning periods; 
 the orders for selecting the n×k signal lines are stored as data in the register of the controller; and 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller in accordance with the data stored in the register. 
 
 
     
     
       13. A device according to  claim 12  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       14. A device according to  claim 12  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       15. An electronic equipment using a device as claimed in  claim 12 . 
     
     
       16. The image display device according to  claim 12 , wherein:
 the controller further comprises a selection signal generating circuit, 
 the data is transmitted from the register to the selection signal generating circuit, and 
 the data is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       17. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 each of the signal line selection circuits has an analog switch; 
 orders for selecting the n×k signal lines are different from each other between successively produced horizontal scanning periods; 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller; and 
 the selection signal is input to the analog switch. 
 
 
     
     
       18. A device according to  claim 17  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       19. A device according to  claim 17  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       20. An electronic equipment using a device as claimed in  claim 17 . 
     
     
       21. The image display device according to  claim 17 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the orders is transmitted from the register to the selection signal generating circuit, and 
 the data for the orders is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       22. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 each of the signal line selection circuits has an analog switch; 
 orders for selecting the n×k signal lines are different from each other between successively produced horizontal scanning periods; 
 the orders for selecting the n×k signal lines are stored as data in the register of the controller; 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller in accordance with the data stored in the register; and 
 the selection signal is input to the analog switch. 
 
 
     
     
       23. A device according to  claim 22  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       24. A device according to  claim 22  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       25. An electronic equipment using a device as claimed in  claim 22 . 
     
     
       26. The image display device according to  claim 22 , wherein:
 the controller further comprises a selection signal generating circuit, 
 the data is transmitted from the register to the selection signal generating circuit, and 
 the data is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       27. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 among the n×k signal lines, a first signal line selected during one horizontal scanning period differs between successively produced horizontal scanning periods; and 
 an order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       28. A device according to  claim 27  wherein:
 each of the signal line selection circuits has an analog switch; and 
 the selection signal is input to the analog switch. 
 
     
     
       29. A device according to  claim 27  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       30. A device according to  claim 27  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       31. An electronic equipment using a device as claimed in  claim 27 . 
     
     
       32. The image display device according to  claim 27 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the order is transmitted from the register to the selection signal generating circuit, and 
 the data for the order is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       33. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 among the n×k signal lines, a first signal line selected during one horizontal scanning period differs between successively produced horizontal scanning periods; 
 the orders for selecting the n×k signal lines are stored as data in the register of the controller; and 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller in accordance with the data stored in the register. 
 
 
     
     
       34. A device according to  claim 33  wherein:
 each of the signal line selection circuits has an analog switch; and 
 the selection signal is input to the analog switch. 
 
     
     
       35. A device according to  claim 33  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       36. A device according to  claim 33  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       37. An electronic equipment using a device as claimed in  claim 33 . 
     
     
       38. The image display device according to  claim 33 , wherein:
 the controller further comprises a selection signal generating circuit, 
 the data is transmitted from the register to the selection signal generating circuit, and 
 the data is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       39. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 an order for selecting the n×k signal lines during one horizontal scanning period is changed at random every horizontal scanning period; and 
 the order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       40. A device according to  claim 39  wherein:
 each of the signal line selection circuits has an analog switch; and 
 the selection signal is input to the analog switch. 
 
     
     
       41. A device according to  claim 39  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       42. A device according to  claim 39  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       43. An electronic equipment using a device as claimed in  claim 39 . 
     
     
       44. The image display device according to  claim 39 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the order is transmitted from the register to the selection signal generating circuit, and 
 the data for the order is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       45. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits each connected to the register, 
 k sets of second memory circuits each connected to one of the first memory circuits, 
 k sets of D/A converter circuits each connected to one of the second memory circuits, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input an analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 an order for selecting the n×k signal lines during one horizontal scanning period is changed at random every horizontal scanning period; 
 the orders for selecting the n×k signal lines are stored as data in the register of the controller; and 
 the orders for selecting the n×k signal lines are determined by a selection signal generated in the controller in accordance with the data stored in the register. 
 
 
     
     
       46. A device according to  claim 45  wherein:
 each of the signal line selection circuits has an analog switch; and 
 the selection signal is input to the analog switch. 
 
     
     
       47. A device according to  claim 45  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       48. A device according to  claim 45  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       49. An electronic equipment using a device as claimed in  claim 45 . 
     
     
       50. The image display device according to  claim 45 , wherein:
 the controller further comprises a selection signal generating circuit, 
 the data is transmitted from the register to the selection signal generating circuit, and 
 the data is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       51. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits for storing a digital video signal of m bits, wherein m is a natural number which is equal to 2 or more, 
 k sets of second memory circuits for storing an output signal of the first memory circuits, 
 k sets of D/A converter circuits for converting an output signal of the second memory circuits into an analog video signal, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input the analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 orders for selecting the n×k signal lines are different from each other between successively produced horizontal scanning periods; and 
 an order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       52. A device according to  claim 51  wherein each of the first memory circuits and the second memory circuits is a latch. 
     
     
       53. A device according to  claim 52  wherein the latch comprises an analog switch and a retaining capacitor. 
     
     
       54. A device according to  claim 52  wherein the latch comprises a clocked inverter. 
     
     
       55. A device according to  claim 52  wherein the latch comprises an analog switch and a plurality of inverters. 
     
     
       56. A device according to  claim 51  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       57. A device according to  claim 51  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       58. An electronic equipment using a device as claimed in  claim 51 . 
     
     
       59. The image display device according to  claim 51 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the orders is transmitted from the register to the selection signal generating circuit, and 
 the data for the orders is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       60. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits for storing a digital video signal of m bits, wherein m is a natural number which is equal to 2 or more, 
 k sets of second memory circuits for storing an output signal of the first memory circuits, 
 k sets of D/A converter circuits for converting an output signal of the second memory circuits into an analog video signal, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input the analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 among the n×k signal lines, a first signal line selected during one horizontal scanning period differs between successively produced horizontal scanning periods; and 
 an order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       61. A device according to  claim 60  wherein each of the first memory circuits and the second memory circuits is a latch. 
     
     
       62. A device according to  claim 61  wherein the latch comprises an analog switch and a retaining capacitor. 
     
     
       63. A device according to  claim 61  wherein the latch comprises a clocked inverter. 
     
     
       64. A device according to  claim 61  wherein the latch comprises an analog switch and a plurality of inverters. 
     
     
       65. A device according to  claim 60  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       66. A device according to  claim 60  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       67. An electronic equipment using a device as claimed in  claim 60 . 
     
     
       68. An image display device comprising:
 a signal line driver circuit; 
 a controller; and 
 n×k signal lines, wherein n is a natural number which is equal to 2 or more, and k is a natural number which is equal to 2 or more, wherein:
 the controller includes a register; 
 the signal line driver circuit includes:
 k sets of first memory circuits for storing a digital video signal of m bits, wherein m is a natural number which is equal to 2 or more, 
 k sets of second memory circuits for storing an output signal of the first memory circuits, 
 k sets of D/A converter circuits for converting an output signal of the second memory circuits into an analog video signal, and 
 k sets of signal line selection circuits for selecting k signal lines among the n×k signal lines to input the analog video signal; 
 
 each of the D/A converter circuits is connected to one of the signal line selection circuits; 
 each of the signal line selection circuits is connected to n pieces of the signal lines; 
 an order for selecting the n×k signal lines during one horizontal scanning period is changed at random every horizontal scanning period; and 
 an order for selecting the n×k signal lines is determined by a selection signal generated in the controller. 
 
 
     
     
       69. The image display device according to  claim 60 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the order is transmitted from the register to the selection signal generating circuit, and 
 the data for the order is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       70. A device according to  claim 68  wherein each of the first memory circuits and the second memory circuits is a latch. 
     
     
       71. A device according to  claim 70  wherein the latch comprises an analog switch and a retaining capacitor. 
     
     
       72. A device according to  claim 70  wherein the latch comprises a clocked inverter. 
     
     
       73. A device according to  claim 70  wherein the latch comprises an analog switch and a plurality of inverters. 
     
     
       74. A device according to  claim 68  wherein the signal line driver circuit comprises a polysilicon thin film transistor. 
     
     
       75. A device according to  claim 68  wherein the signal line driver circuit comprises a single crystalline transistor. 
     
     
       76. An electronic equipment using a device as claimed in  claim 68 . 
     
     
       77. The image display device according to  claim 68 , wherein:
 the controller further comprises a selection signal generating circuit, 
 data for the order is transmitted from the register to the selection signal generating circuit, and 
 the data for the order is transmitted from the selection signal generating circuit to the k sets of signal line selection circuits. 
 
     
     
       78. A method of driving an image display device for displaying an image using an analog video signal, comprising:
 inputting the analog video signal to k sets of signal line selection circuits during one horizontal scanning period, wherein k is a natural number which is equal to 2 or more; and 
 inputting each of the analog video signals from the k sets of signal line selection circuits to n pieces of signal lines connected to each of the signal line selection circuits in order during the period, wherein n is a natural number which is equal to 2 or more, 
 wherein orders for selecting n×k signal lines are different from each other between successively produced two horizontal scanning periods. 
 
     
     
       79. A method of driving an image display device according to  claim 78 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller. 
     
     
       80. A method of driving an image display device according to  claim 78 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller in accordance with data stored in a register included in the controller. 
     
     
       81. A method of driving an image display device according to  claim 78 , wherein the order for selecting the n×k signal lines is determined by inputting a selection signal generated in a controller to an analog switch of a signal line driver circuit in accordance with data stored in a register of the controller. 
     
     
       82. A method of driving an image display device for displaying an image using an analog video signal, comprising:
 inputting the analog video signal to k sets of signal line selection circuits during a period, wherein k is a natural number which is equal to 2 or more; and 
 inputting each of the analog video signals from the k sets of signal line selection circuits to n pieces of signal lines connected to each of the signal line selection circuits in order during the period, wherein n is a natural number which is equal to 2 or more, 
 wherein among n×k signal lines, a first signal line selected during one horizontal scanning period differs between successively produced two horizontal scanning periods. 
 
     
     
       83. A method of driving an image display device according to  claim 82 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller. 
     
     
       84. A method of driving an image display device according to  claim 82 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller in accordance with data stored in a register included in the controller. 
     
     
       85. A method of driving an image display device according to  claim 82 , wherein the order for selecting the n×k signal lines is determined by inputting a selection signal generated in a controller to an analog switch of a signal line driver circuit in accordance with data stored in a register of the controller. 
     
     
       86. A method of driving an image display device for displaying an image using an analog video signal, comprising:
 inputting the analog video signal to k sets of signal line selection circuits during a period, wherein k is a natural number which is equal to 2 or more; and 
 inputting each of the analog video signals from the k sets of signal line selection circuits to n pieces of signal lines connected to each of the signal line selection circuits in order during the period, wherein n is a natural number which is equal to 2 or more, 
 wherein an order for selecting n×k signal lines is changed at random every horizontal scanning period. 
 
     
     
       87. A method of driving an image display device according to  claim 86 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller. 
     
     
       88. A method of driving an image display device according to  claim 86 , wherein the order for selecting the n×k signal lines is determined by a selection signal generated in a controller in accordance with data stored in a register included in the controller. 
     
     
       89. A method of driving an image display device according to  claim 86 , wherein the order for selecting the n×k signal lines is determined by inputting a selection signal generated in a controller to an analog switch of a signal line driver circuit in accordance with data stored in a register of the controller.