Array substrates of liquid crystal display and fabrication method thereof

Abstract

Provided is an array substrate of an LCD that includes a substrate, an active layer, a first insulating layer, and a gate electrode sequentially formed on the substrate. A source region and a drain region reside in predetermined regions of the active layer and each is doped with impurity ions. A second insulating layer overlies an entire surface of the substrate including the gate electrode. A pixel electrode resides on the second insulating layer. First and second contact holes reside in the first and second insulating layer and expose portions of the source region and the drain region, respectively. A portion of a source electrode contacts the source region through the first contact hole and a first portion of a drain electrode contacts the drain region and a second portion contacts the pixel electrode.

1. A method of fabricating an array substrate of an LCD, the method comprising:
 sequentially forming an active layer, a first insulating layer, and a gate electrode on a substrate; 
 forming a source region and a drain region on predetermined regions of the active layer by implanting impurity ions into the predetermined regions of the active layer; 
 forming a second insulating layer on an entire surface of the substrate including the gate electrode; 
 forming a pixel electrode on the second insulating layer, and forming first and second contact holes by removing portions of the first and second insulating layer overlying the source region and the drain region; 
 forming a source electrode of which a portion contacts the source region through the first contact hole; 
 forming a drain electrode of which a first portion contacts the drain region and a second portion contacts the pixel electrode, and, 
 forming a third insulating layer formed on the source electrode, the drain electrode and the pixel electrode. 
 
   
   
     2. The method of  claim 1 , wherein the forming the pixel electrode and the first and second contact holes comprises:
 forming a transparent conductive film on the second insulating layer; 
 coating a photoresist film on the transparent conductive film; 
 irradiating a light onto the coated photoresist film using a mask having a first transmission region partially transmitting the light, a second transmission region completely transmitting the light, and a blocking region that substantially blocks the light; 
 developing the photoresist film exposed to the light to form a first photoresist pattern corresponding to the first transmission region and a second photoresist pattern corresponding to the shielding region; 
 partially removing the first insulating layer, the second insulating layer, and the transparent conductive film using the first and second photoresist patterns as a mask to form the first and second contact holes; 
 removing the first photoresist pattern; and 
 patterning the transparent conductive film using the second photoresist pattern as a mask to form the pixel electrode. 
 
   
   
     3. The method of  claim 2 , wherein the first transmission region has a diffraction pattern for partially transmitting the light that is incident into regions other than the regions where the first and second contact holes are being formed. 
   
   
     4. The method of  claim 2 , wherein the first transmission region has a halftone pattern for partially transmitting the light that is incident into a region other than regions where the first and second contact holes are being formed. 
   
   
     5. The method of  claim 3 , wherein the diffraction pattern comprises a slit-shaped bar for partially shielding the light and a space for transmitting the light. 
   
   
     6. The method of  claim 3 , wherein the diffraction pattern has a slit width ranging from about 1.0 μm to about 2.0 μm. 
   
   
     7. The method of  claim 2 , wherein the slit widths of the diffraction pattern have a difference such that the photoresist pattern has a substantially uniform thickness. 
   
   
     8. The method of  claim 7 , wherein the slit widths of the diffraction pattern differ where a metal layer exists on a region of the substrate corresponding to the diffraction pattern. 
   
   
     9. The method of  claim 8 , wherein the diffraction pattern over the metal layer has the slit width of about 1.0 μm and the diffraction pattern over a region not having the metal layer has the slit width of about 1.2 μm. 
   
   
     10. The method of  claim 1 , further comprising:
 forming a third insulating layer overlying an entire surface of the substrate including the source electrode and the drain electrode; 
 removing a predetermined portion of the third insulating layer to form a third contact hole exposing a predetermined region of the third insulating layer, and exposing the pixel electrode; and 
 forming a reflection electrode electrically connected with the drain electrode through the third contact hole on the third insulating layer. 
 
   
   
     11. The method of  claim 1 , wherein the gate electrode comprises a first gate electrode branching from a gate line, and a second gate electrode, which comprises a portion of the gate line overlapping the active layer. 
   
   
     12. A method of fabricating an array substrate of an LCD, the method comprising:
 forming an active layer on a substrate using a first mask process; 
 depositing a first insulating layer and a first metal layer on the substrate including the active layer and patterning the first metal layer using a second mask process to form a gate electrode; 
 forming a source region and a drain region on predetermined regions of the active layer by implanting impurity ions into the predetermined regions of the active layer; 
 depositing a second insulating layer and a transparent conductive film on an entire surface of the substrate including the gate electrode, and removing portions of the first and second insulating layers and the transparent conductive film using a third mask process to form first and second contact holes partially exposing the source and drain electrodes, and a pixel electrode; 
 depositing a second metal layer on the substrate and patterning the second metal layer using a fourth mask process to form a source electrode and a drain electrode, such that the source electrode is connected to the source region through the first contact hole and the drain electrode is connected to the drain electrode through the second contact hole and, 
 forming a third insulating layer formed on the source electrode, the drain electrode and the pixel electrode. 
 
   
   
     13. The method of  claim 12 , wherein the pixel electrode and the first and second contact holes are formed using a mask comprising a diffraction pattern. 
   
   
     14. The method of  claim 13 , wherein the diffraction pattern partially transmits incident light through regions other than the regions where the pixel electrode and the first and second contact holes are being formed. 
   
   
     15. The method of  claim 14 , wherein slit widths of the diffraction pattern differ when a metal layer exists on a region of the substrate corresponding to the diffraction pattern. 
   
   
     16. The method of  claim 12 , wherein the gate electrode comprises a first gate electrode branching from a gate line, and a second gate electrode, which comprises a portion of the gate line overlapping the active layer.