US7680869B2ExpiredUtilityA1
Interpolation and decimation using newton polyphase filters
Est. expiryMar 30, 2025(expired)· nominal 20-yr term from priority
Inventors:Alexander Chiskis
H03H 17/0275H03H 17/0657H03H 17/0664
47
PatentIndex Score
2
Cited by
19
References
16
Claims
Abstract
An interpolation filter for interpolating a digital signal includes a cascade of template filters, each having an identical template transfer function A(z), which is arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate. Ancillary circuitry is coupled to the cascade so as to produce first and second phase outputs. A multiplexer is arranged to multiplex the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rate.
Claims
exact text as granted — not AI-modified1. An interpolation filter for interpolating a digital signal, comprising:
multiple template filters, which have respective inputs and outputs and an identical template transfer function A(z), which are connected in a cascade such that an input of a given template filter is connected to an output of another template filter that precedes the given template filter in the cascade, and which are arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate;
ancillary circuitry, which is coupled to receive and process a first subset of the inputs and the outputs of the template filters to produce a first phase output, and to receive and process a second subset of the inputs and the outputs of the template filters, different from the first subset, to produce a second phase output; and
a multiplexer, which is arranged to multiplex the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rate,
wherein the ancillary circuitry is coupled to delay, scale and combine the inputs and outputs in the respective first and second subsets in order to produce the first and second phase outputs.
2. The interpolation filter according to claim 1 , wherein the cascade comprises N template filters, and wherein the ancillary circuitry and multiplexer are arranged so that the interpolation filter has a transfer function H(z)=[z −1 +A(z 2 )] N .
3. The interpolation filter according to claim 1 , wherein the ancillary circuitry is operative to scale each of the outputs in the first and second subsets by a multiplicative coefficient
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,
wherein k is an index indicating an order of the template filters in the cascade.
4. The interpolation filter according to claim 1 , wherein the ancillary circuitry is operative to scale each of the outputs in the first and second subsets by performing one or more shift and add operations.
5. The interpolation filter according to claim 1 , wherein the template filters and the ancillary circuitry are arranged to operate at the input sampling rate.
6. The interpolation filter according to claim 1 , wherein the cascade, ancillary circuitry and multiplexer are implemented in an application-specific integrated circuit (ASIC).
7. The interpolation filter according to claim 1 , wherein A(z)=(a+z −1 )/(1+az −1 ) , wherein a is a constant.
8. A multistage interpolation filter for interpolating a digital signal, comprising two or more interpolation filters connected in series, the interpolation filters comprising at least:
a first interpolation filter, which comprises:
a first plurality of first template filters, which have respective first inputs and first outputs and an identical first stage template transfer function A 1 (z), which are connected in a first cascade such that a first input of a given first template filter is connected to a first output of another first template filter that precedes the given first template filter in the first cascade, and which are arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate;
first ancillary circuitry, which is coupled to receive and process a first subset of the first inputs and the first outputs to produce a first phase output, and to receive and process a second subset of the first inputs and the first outputs, different from the first subset, to produce a second phase output; and
a first multiplexer, which is arranged to multiplex the first and second phase outputs in order to generate a first output sequence having a first output sampling rate equal to twice the input sampling rate; and
a second interpolation filter, which comprises:
a second plurality of second template filters, which have respective second inputs and second outputs and an identical second stage template transfer function A 2 (z), which are connected in a second cascade such that a second input of a given second template filter is connected to a second output of another second template filter that precedes the given second template filter in the second cascade, and which are arranged to receive and filter the first output sequence at the first output sampling rate;
second ancillary circuitry, which is coupled to receive and process a third subset of the second inputs and the second outputs to produce a third phase output, and to receive and process a fourth subset of the second inputs and the second outputs, different from the third subset, to produce a fourth phase output; and
a second multiplexer, which is arranged to multiplex the third and fourth phase outputs in order to generate a second output sequence having a second output sampling rate equal to twice the first output sampling rate
wherein at least the first and second stage template transfer functions are different from one other.
9. An analog front-end circuit for converting a digital discrete multi-tone (DMT) signal to an analog signal, comprising:
one or more interpolation filters, which are arranged to receive and interpolate the digital DMT signal so as to produce an interpolated signal, each interpolation filter comprising:
multiple template filters, which have respective inputs and outputs and an identical template transfer function A(z), which are connected in a cascade such that an input of a given template filter is connected to an output of another template filter that precedes the given template filter in the cascade, and which are arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate;
ancillary circuitry, which is coupled to receive and process a first subset of the inputs and the outputs of the template filters to produce a first phase output, and to receive and process a second subset of the inputs and the outputs of the template filters, different from the first subset, to produce a second phase output; and
a multiplexer, which is arranged to multiplex the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rate; and
a digital-to-analog converter, which is arranged to convert the interpolated signal to an analog signal,
wherein the ancillary circuitry in each interpolation filter is coupled to delay, scale and combine the inputs and outputs in the respective first and second subsets in order to produce the first and second phase outputs.
10. The circuit according to claim 9 , wherein the one or more interpolation filters comprise a plurality of the interpolation filters connected in series.
11. A method for interpolating a digital signal, comprising:
receiving an input sequence representing the digital signal sampled at an input sampling rate;
filtering the input sequence using multiple template filters, which are implemented in an Application Specific Integrated Circuit (ASIC) and have respective inputs and outputs and an identical template transfer function A(z), and which are connected in a cascade such that an input of a given template filter is connected to an output of another template filter that precedes the given template filter in the cascade;
processing a first subset of the inputs and the outputs of the template filters to produce a first phase output, and processing a second subset of the inputs and the outputs of the template filters, different from the first subset, to produce a second phase output; and
multiplexing the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rates,
wherein processing the inputs and outputs in the respective first and second subsets comprises delaying, scaling and combining the inputs and outputs in the respective first and second subsets in order to produce the first and second phase outputs.
12. The method according to claim 11 , wherein the cascade comprises N template filters, and wherein filtering the input sequence, processing the first and second subsets, and multiplexing the phase outputs result in applying a transfer function H(z)=[z −1 +A(z 2 )] N to the input sequence.
13. The method according to claim 11 , wherein scaling the inputs and outputs comprises scaling each of the outputs in the first and second subsets by a multiplicative coefficient
C
k
=
(
N
k
)
=
N
!
k
!
(
N
-
k
)
!
,
wherein k is an index indicating an order of the template filters in the cascade.
14. The method according to claim 11 , wherein scaling the inputs and outputs comprises scaling each of the outputs in the first and second subsets by performing one or more shift and add operations.
15. The method according to claim 11 , wherein filtering the input sequence and processing the inputs and outputs are performed at the input sampling rate.
16. The method according to claim 11 , wherein A(z)=(a+z −1 )/(1+az −1 ), wherein a is a constant.Cited by (0)
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