Analog phase shifter

Abstract

In one embodiment, an integrated phase shifter includes: a plurality of stages, wherein each stage comprises: a transistor amplifier configured to amplify a voltage signal received at an input node into an amplified voltage signal at an output node according to a gain, wherein the transistor amplifier is configured such that the gain is proportional to a bias signal; an integrated inductor loading the output node, wherein the gain of the transistor amplifier is also proportional to an inductance of the integrated inductor; and a varactor diode loading the output node, wherein the varactor diode has a variable capacitance responsive to a control voltage.

1. An integrated phase shifter, comprising:
 a plurality of stages, wherein each stage includes: 
 a transistor amplifier configured to amplify a voltage signal received at an input node into an amplified voltage signal at an output node according to a gain, wherein the transistor amplifier is configured such that the gain is proportional to a bias signal; 
 an integrated inductor loading the output node, wherein the gain of the transistor amplifier is also proportional to an inductance of the integrated inductor; and 
 a varactor diode loading the output node, wherein the varactor diode has a variable capacitance responsive to a control voltage. 
 
     
     
       2. The integrated phase shifter of  claim 1 , wherein each transistor amplifier comprises bipolar transistors and wherein the bias signal comprises a bias current. 
     
     
       3. The integrated phase shifter of  claim 1 , wherein each transistor amplifier comprises field effect transistors and wherein the bias signal comprises a bias voltage. 
     
     
       4. The integrated phase shifter of  claim 1 , further comprising: a control unit configured to control the bias signals such an overall gain through the stages is constant despite a variation in the control voltage. 
     
     
       5. The integrated phase shifter of  claim 2 , wherein each transistor amplifier comprises a first bipolar transistor having an emitter coupled to a collector of a second bipolar transistor, and wherein the output node of the transistor amplifier couples to the emitter of the first bipolar transistor. 
     
     
       6. The integrated phase shifter of  claim 5 , wherein the input node of each transistor amplifier couples to a base of the second bipolar transistor through a DC blocking capacitor. 
     
     
       7. The integrated phase shifter of  claim 6 , wherein each DC blocking capacitor comprises metal layers in a semiconductor process used to form the integrated phase shifter. 
     
     
       8. The integrated phase shifter of  claim 5 , wherein the bias current is provided by a current source coupled to the base of the second bipolar transistor. 
     
     
       9. A method, comprising:
 providing a phase shifter including a plurality of stages, wherein each stage includes a transistor amplifier configured to amplify a voltage signal received at an input node into an amplified voltage signal at an output node according to a gain, wherein the transistor amplifier is configured such that the gain is proportional to a bias signal; an integrated inductor loading the output node, wherein the gain of the transistor amplifier is also proportional to an inductance of the integrated inductor; and a varactor diode loading the output node, wherein the varactor diode has a variable capacitance responsive to a control voltage; 
 driving the input node of a first one of the stages with in input signal while varying a frequency of the input signal; and 
 determining the phase change and gain though each stage responsive to a plurality of values for the control voltage at the varied frequencies of the input signal; and 
 determining a pivot frequency for the input signal at which a maximum phase shift difference is achieved across the plurality of values of the control voltage and at which a minimal gain difference is achieved across the plurality of values of the control voltages.