P
US7777759B2ExpiredUtilityPatentIndex 74

Image processing apparatus and image display apparatus using same

Assignee: SHARP KKPriority: Mar 24, 2000Filed: Oct 7, 2005Granted: Aug 17, 2010
Est. expiryMar 24, 2020(expired)· nominal 20-yr term from priority
Inventors:YOSHIDA YASUHIROFURUKAWA HIROYUKI
H04N 9/69G09G 2320/0285H04N 5/66G09G 3/2059G09G 2320/0626G09G 2320/0276G09G 2320/0606G09G 3/20G09G 3/2011G09G 3/3614G09G 2320/02G09G 2320/0673G09G 2320/0242G09G 3/3648G09G 3/2092G09G 3/2048H04N 5/21
74
PatentIndex Score
7
Cited by
41
References
35
Claims

Abstract

An image processing apparatus of the present invention comprising (a) a first signal processing circuit for applying gamma correction to an n-bit (n: a natural number) digital signal inputted as a video signal and for converting the n-bit digital signal into an m-bit (m>n, m: a natural number) digital signal, and (b) a second signal processing circuit for adding a noise signal, which is used for pseudo contour reduction, into the m-bit digital signal from the first signal processing circuit and for outputting a Q-bit (Q: a natural number) digital signal, which is obtained from rounding off a less significant (m−Q) bit (Q≦n) from the m-bit digital signal, to a display section.

Claims

exact text as granted — not AI-modified
1. An image processing apparatus, comprising:
 a first signal processing circuit for converting an n-bit (n: a natural number) digital signal inputted as a video signal, into an m-bit (m>n, m: a natural number) digital signal, the n-bit digital signal expressing tone gradation of 2 n  and the m-bit digital signal expressing tone gradation of 2 m ; 
 a second signal processing circuit for adding a noise signal to the m-bit digital signal inputted from said first signal processing circuit, rounding down a less significant (m−Q) bit (Q≦n, Q: a natural number) from the m-bit digital signal having added thereto the noise signal, and outputting the resulting Q-bit digital signal to liquid crystal display means capable of a Q-bit display; 
 wherein the noise signal varies not slower than a response speed of the liquid crystal display means; and 
 wherein the second signal processing circuit outputs the Q-bit digital signal from the first signal processing circuit to a liquid crystal display means for displaying a Q-bit digital signal, and the noise signal changes at a higher speed than a response speed of the liquid crystal display means. 
 
   
   
     2. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit includes bit converting means for converting the inputted n-bit digital signal into the m-bit digital signal in accordance with a pre-set value. 
 
   
   
     3. The image processing apparatus as set forth in  claim 2 , wherein:
 said bit converting means is a Look Up Table which outputs the m-bit digital signal that is the pre-set value in accordance with the inputted n-bit digital signal. 
 
   
   
     4. The image processing apparatus as set forth in  claim 2 , wherein:
 said bit converting means is a calculating device for converting the n-bit digital signal into the m-bit digital signal by numerical calculation. 
 
   
   
     5. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal so as to absorb differences in performances of said driving means for driving display means which displays an image based on the Q-bit digital signal. 
 
   
   
     6. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal in accordance with ambient brightness of display means which displays an image based on the Q-bit digital signal. 
 
   
   
     7. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal in accordance with overall brightness of an image displayed on display means based on the Q-bit digital signal. 
 
   
   
     8. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal according to an average level of the n-bit digital signal. 
 
   
   
     9. The image processing apparatus as set forth in  claim 1 , wherein:
 said first signal processing circuit and said second signal processing circuit are provided for respective RGB colors. 
 
   
   
     10. The image processing apparatus as set forth in  claim 1 , wherein:
 an average value of a signal level of the noise signal is set to zero. 
 
   
   
     11. The image processing apparatus as set forth in  claim 1 , wherein:
 the noise signal is a random noise signal with no regularity in its cycle of amplitude. 
 
   
   
     12. The image processing apparatus as set forth in  claim 1 , wherein:
 the noise signal is obtained, by using an arbitrary noise pattern table, by switching a starting point of the noise pattern table per field or per noise pattern table. 
 
   
   
     13. The image display apparatus, comprising:
 said image processing apparatus of  claim 1 . 
 
   
   
     14. A personal computer, comprising:
 said image processing apparatus of  claim 1 . 
 
   
   
     15. An image processing apparatus, comprising:
 a first signal processing circuit for processing with a predetermined operation an n-bit digital signal (n: natural number) inputted as a video signal to be converted into an m-bit (m>n, a natural number) digital signal, the n-bit digital signal expressing tone gradation of 2 n  and the m-bit digital signal expressing tone gradation of 2 m ; and a second signal processing circuit for adding a noise signal to the m-bit digital signal inputted from said first signal processing circuit, rounding down a less significant (M−Q) bit (Q≦n, Q: a natural number) from the m-bit digital signal having added thereto the noise signal, and outputting the resulting Q-bit digital signal to liquid crystal display means capable of a Q-bit display; 
 wherein the noise signal varies not slower than a response speed of the liquid crystal display means; 
 wherein said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal according to display characteristics of display means said display apparatus which displays an image based on the Q-bit digital signal; and 
 wherein the second signal processing circuit outputs the Q-bit digital signal from the first signal processing circuit to a liquid crystal display means for displaying a Q-bit digital signal, and the noise signal changes at a higher speed than a response speed of the liquid crystal display means. 
 
   
   
     16. The image processing apparatus as set forth in  claim 15 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal so as to absorb differences in performances of said driving means for driving display means which displays an image based on the Q-bit digital signal. 
 
   
   
     17. The image processing apparatus as set forth in  claim 15 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal in accordance with ambient brightness of display means which displays an image based on the Q-bit digital signal. 
 
   
   
     18. The image processing apparatus as set forth in  claim 15 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal in accordance with overall brightness of an image displayed on display means based on the Q-bit digital signal. 
 
   
   
     19. The image processing apparatus as set forth in  claim 15 , wherein:
 said first signal processing circuit converts the n-bit digital signal as inputted into the m-bit digital signal according to an average level of the n-bit digital signal. 
 
   
   
     20. An image processing apparatus, comprising:
 a first signal processing circuit for applying gamma correction to an n-bit (n: a natural number) digital signal inputted as a video signal, and for converting the digital signal into an m-bit (m>n, m: a natural number) digital signal, the n-bit digital signal expressing tone gradation of 2 n  and the m-bit digital signal expressing tone gradation of 2 m ; 
 a second signal processing circuit for adding a noise signal to the m-bit digital signal from said first signal processing circuit, rounding down a less significant (m−Q) bit (Q≦n, Q: a natural number) from the m-bit digital signal having added thereto the noise signal, and outputting the resulting Q-bit digital signal to liquid crystal display means capable of a Q-bit display; 
 wherein the noise signal varies not slower than a response speed of the liquid crystal display means; 
 wherein said first signal processing circuit includes bit converting means for converting the inputted n-bit digital signal into the m-bit digital signal in accordance with a pre-set value; and 
 wherein the second signal processing circuit outputs the Q-bit digital signal from the first signal processing circuit to a liquid crystal display means for displaying a Q-bit digital signal, and the noise signal changes at a higher speed than a response speed of the liquid crystal display means. 
 
   
   
     21. The image processing apparatus as set forth in  claim 20 , wherein:
 said bit converting means is a Look Up Table which outputs the m-bit digital signal that is the preset value in accordance with the inputted n-bit digital signal. 
 
   
   
     22. The image processing apparatus as set forth in  claim 20 , wherein:
 said bit converting means is a calculating device for converting the n-bit digital signal into the m-bit digital signal by numerical calculation. 
 
   
   
     23. The image processing apparatus as set forth in  claim 20 , wherein:
 said first signal processing circuit and said second signal processing circuit are provided for respective RGB colors. 
 
   
   
     24. The image processing apparatus as set forth in  claim 20 , wherein:
 an average value of a signal level of the noise signal is set to zero. 
 
   
   
     25. The image processing apparatus as set forth in  claim 20 , wherein:
 the noise signal is a random noise signal with no regularity in its cycle of amplitude. 
 
   
   
     26. The image processing apparatus as set forth in  claim 20 , wherein:
 the noise signal is obtained, by using an arbitrary noise pattern table, by switching a starting point of the noise pattern table per field or per noise pattern table. 
 
   
   
     27. An image display apparatus, comprising:
 an image processing apparatus of  claim 20 ; 
 display means for displaying an image; and 
 driving means for driving the display means. 
 
   
   
     28. The image display apparatus as set forth in  claim 27 , wherein:
 said first signal processing circuit includes bit converting means for converting the inputted n-bit digital signal into the m-bit digital signal in accordance with a pre-set value. 
 
   
   
     29. The image display apparatus as set forth in  claim 28 , wherein:
 the pre-set value is to be rewritten so as to absorb differences in performances of said driving means. 
 
   
   
     30. The image display apparatus as set forth in  claim 28 , wherein:
 the pre-set value is to be rewritten in accordance with ambient brightness of said display means. 
 
   
   
     31. The image display apparatus as set forth in  claim 28 , wherein:
 the pre-set value is to be rewritten in accordance with overall brightness of an image displayed on said display means. 
 
   
   
     32. The image display apparatus as set forth in  claim 28 , wherein:
 said image display means is a liquid crystal display. 
 
   
   
     33. The image processing apparatus of  claim 1 , wherein the second signal processing circuit comprises a noise generating circuit, an adding circuit, and a bit number converting circuit. 
   
   
     34. The image processing apparatus of  claim 15 , wherein the second signal processing circuit comprises a noise generating circuit, an adding circuit, and a bit number converting circuit. 
   
   
     35. The image processing apparatus of  claim 20 , wherein the second signal processing circuit comprises a noise generating circuit, an adding circuit, and a bit number converting circuit.

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