Switching circuit having a driver for providing a linear voltage transition

Abstract

A switching circuit includes a first transistor and a driver circuit. The first transistor has a first current electrode coupled to a first power supply voltage terminal to receive a first power supply voltage, a control electrode, and a second current electrode coupled to an output terminal. The driver circuit has an output coupled to the control electrode of the first transistor, the driver circuit for providing a bias current to the control electrode of the first transistor that is proportional to an inverse of a square root of a voltage between the first current electrode and the control electrode of the first transistor. A voltage at the output terminal increases linearly during a turn-on period of the first transistor.

1. A switching circuit comprising:
 a first transistor having a first current electrode coupled to a first power supply voltage terminal to receive a first power supply voltage, a control electrode, and a second current electrode coupled to an output terminal; and 
 a driver circuit having an output coupled to the control electrode of the first transistor, the driver circuit for providing a bias current to the control electrode of the first transistor that is proportional to an inverse of a square root of a voltage between the first current electrode and the control electrode of the first transistor, wherein a voltage at the output terminal increases substantially linearly during a turn-on period of the first transistor. 
 
     
     
       2. The switching circuit of  claim 1 , wherein the driver circuit comprises:
 a subtraction circuit having a first input terminal coupled to the first power supply voltage terminal, a second input terminal coupled to the control electrode of the first transistor, and an output terminal; 
 an inversion circuit having an input terminal coupled to the output terminal of the subtraction circuit, and an output terminal; 
 a square root circuit having an input terminal coupled to the output of the inversion circuit, and an output terminal for providing an output current; and 
 a current source having a first terminal coupled to a voltage terminal, a control terminal coupled to and a second terminal coupled to provide the bias current to the control electrode of the first transistor. 
 
     
     
       3. The switching circuit of  claim 2 , wherein the subtraction circuit further comprises a clamping circuit for preventing the control electrode of the first transistor from receiving a negative bias voltage. 
     
     
       4. The switching circuit of  claim 2 , wherein the voltage terminal is coupled to receive a boosted voltage. 
     
     
       5. The switching circuit of  claim 1 , wherein the first transistor is characterized as being a high side transistor. 
     
     
       6. The switching circuit of  claim 1 , further comprising a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. 
     
     
       7. The switching circuit of  claim 1 , wherein the first transistor is characterized as being an N-channel power metal-oxide semiconductor transistor. 
     
     
       8. The switching circuit of  claim 1 , wherein the driver circuit comprises bipolar transistors. 
     
     
       9. The switching circuit of  claim 1 , further comprising a second driver circuit for biasing a second transistor, the second transistor coupled to the first transistor in a half-bridge configuration. 
     
     
       10. The switching circuit of  claim 1 , wherein the driver circuit comprises a trans-linear circuit. 
     
     
       11. A switching circuit comprising:
 a transistor having a first current electrode coupled to a first power supply voltage terminal to receive a first power supply voltage, a control electrode, and a second current electrode coupled to an output terminal; and 
 a driver circuit comprising:
 a subtraction circuit having a first input terminal coupled to the first power supply voltage terminal, a second input terminal coupled to the control electrode of the transistor, and an output terminal; 
 an inversion circuit having an input terminal coupled to the output terminal of the subtraction circuit, and an output terminal; 
 a square root circuit having an input terminal coupled to the output of the inversion circuit, and an output terminal for providing an output current; and 
 a current source having a first terminal coupled to a voltage terminal, a control terminal coupled to and a second terminal coupled to provide the bias current to the control electrode of the transistor. 
 
 
     
     
       12. The switching circuit of  claim 11 , wherein the subtraction circuit further comprises a clamping circuit for preventing the control electrode of the transistor from receiving a negative bias voltage. 
     
     
       13. The switching circuit of  claim 11 , wherein the voltage terminal is coupled to receive a boosted voltage. 
     
     
       14. The switching circuit of  claim 11 , wherein the transistor is characterized as being a high side transistor. 
     
     
       15. A switching circuit comprising:
 a first transistor having a first current electrode coupled to a first power supply voltage terminal to receive a first power supply voltage, a control electrode, and a second current electrode coupled to an output terminal of the switching circuit; 
 a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal; 
 a first driver circuit having an output coupled to the control electrode of the first transistor, the driver circuit for providing a bias current to the control electrode of the first transistor that is proportional to an inverse of a square root of a voltage between the first current electrode and 
 the second current electrode of the first transistor, wherein a voltage at the output terminal increases substantially linearly during a turn-on period of the first transistor; and 
 a second driver circuit having an output coupled to the control electrode of the second transistor, the second driver circuit for controlling operation of the second transistor. 
 
     
     
       16. The switching circuit of  claim 15 , wherein the driver circuit comprises:
 a subtraction circuit having a first input terminal coupled to the first power supply voltage terminal, a second input terminal coupled to the control electrode of the first transistor, and an output terminal; 
 an inversion circuit having an input terminal coupled to the output terminal of the subtraction circuit, and an output terminal; 
 a square root circuit having an input terminal coupled to the output of the inversion circuit, and an output terminal for providing an output current; and 
 a current source having a first terminal coupled to a voltage terminal, a control terminal coupled to and a second terminal coupled to provide the bias current to the control electrode of the first transistor. 
 
     
     
       17. The switching circuit of  claim 16 , wherein the subtraction circuit further comprises a clamping circuit for preventing the control electrode of the first transistor from receiving a negative bias voltage. 
     
     
       18. The switching circuit of  claim 16 , wherein the voltage terminal is coupled to receive a boosted voltage. 
     
     
       19. The switching circuit of  claim 15 , wherein the first and second transistors are characterized as being N-channel power metal-oxide semiconductor transistors. 
     
     
       20. The switching circuit of  claim 15 , further comprising a control unit coupled to control the operation of both the first and second driver circuits.