Fabrication of recordable electrical memory

Abstract

A memory cell of a memory device is fabricated by forming a first electrode on a substrate, positioning a photo mask at a first position relative to the substrate, and forming a first material layer on the first electrode based on a pattern on the photo mask. The photo mask is positioned at a second position relative to the substrate, and a second material layer is formed above the first material layer based on the pattern on the photo mask, the second material layer being offset from the first material layer so that a first sub-cell of the memory cell includes the first material layer and not the second material layer, and a second sub-cell of the memory cell includes both the first and second material layers. A second electrode is formed above the first and second material layers.

1. A method comprising:
 fabricating a memory cell of a memory device, comprising
 forming a first electrode on a substrate; 
 positioning a photo mask at a first position relative to the substrate; 
 forming a first material layer on the first electrode based on a pattern on the photo mask; 
 positioning the photo mask at a second position relative to the substrate; 
 forming a second material layer above the first material layer based on the pattern on the photo mask, the second material layer being offset from the first material layer so that a first sub-cell of the memory cell includes the first material layer and not the second material layer, and a second sub-cell of the memory cell includes both the first and second material layers; and 
 forming a second electrode above the first and second material layers and overlapping the first electrode. 
 
 
     
     
       2. The method of  claim 1  comprising positioning the photo mask at a third position and forming a third material layer above the first and second material layers based on the pattern on the photo mask, the third material layer being between the first electrode and the second electrode, the third material layer being offset from the first and second material layers so that the memory cell comprises at least the first sub-cell, the second sub-cell, and a third sub-cell. 
     
     
       3. The method of  claim 2  wherein the third sub-cell includes the first and third material layers but not the second material layer. 
     
     
       4. The method of  claim 2  comprising forming a fourth sub-cell that includes the first, second, and third material layers. 
     
     
       5. The method of  claim 2  comprising positioning the photo mask at a fourth position and forming a fourth material layer above the first, second, and third material layers based on the pattern on the photo mask, the fourth layer being between the first electrode and the second electrode, the fourth material layer being offset from the first, second, and third material layers so that the memory cell comprises at least the first sub-cell, the second sub-cell, the third sub-cell, and a fourth sub-cell. 
     
     
       6. The method of  claim 5  comprising positioning the photo mask at a fifth position and forming a fifth material layer above the first, second, third, and fourth material layers based on the pattern on the photo mask, the fifth material layer being offset from the first, second, third, and fourth material layers so that the memory cell comprises at least the first sub-cell, the second sub-cell, the third sub-cell, the fourth sub-cell, and a fifth sub-cell. 
     
     
       7. The method of  claim 1  wherein positioning the photo mask at the second position comprises shifting the photo mask for a distance from the first position to the second position in which the distance is less than a smallest line width of the photo mask. 
     
     
       8. The method of  claim 1  wherein forming the first layer comprises forming a layer of material having openings, the openings to allow portions of the first electrode to electrically contact portions of the second electrode. 
     
     
       9. The method of  claim 1  wherein forming the first material layer comprises forming a semiconductor layer or a dielectric layer. 
     
     
       10. The method of  claim 1  comprising forming circuitry for applying a write signal to the memory cell. 
     
     
       11. The method of  claim 1  comprising forming circuitry for outputting a read signal from the memory cell. 
     
     
       12. A method comprising:
 fabricating a memory device having memory cells, each memory cell having at least two sub-cells, comprising
 positioning a photo mask at two or more positions, the photo mask having a predetermined pattern, and 
 for each position of the photo mask, forming at least one material layer based on the predetermined pattern of the photo mask to cause different sub-cells to have different material layers or different combinations of material layers. 
 
 
     
     
       13. The method of  claim 12  wherein fabricating the sub-cells comprises positioning the photo mask at three positions to form four sub-cells. 
     
     
       14. The method of  claim 12  wherein fabricating the sub-cells comprises positioning the photo mask at five positions to form nine sub-cells. 
     
     
       15. The method of  claim 12  wherein each material layer has a portion that overlaps a portion of another material layer. 
     
     
       16. The method of  claim 12  wherein fabricating the sub-cells comprises depositing a first layer on a lower electrode, adjusting an alignment of the photo mask, and depositing a second layer on the first layer, wherein a first sub-cell includes the first layer and not the second layer, and a second sub-cell includes both the first and second layers. 
     
     
       17. The method of  claim 12  wherein fabricating the sub-cells comprises depositing a first layer on a lower electrode, etching the first layer, adjusting an alignment of the photo mask, depositing a second layer on the first layer and an exposed portion of the lower electrode, and etching the second layer, wherein a first sub-cell includes the second layer and not the first layer, and a second sub-cell includes both the first and second layers. 
     
     
       18. The method of  claim 12  wherein positioning the photo mask at two or more positions comprises positioning the photo mask a first position and a second position spaced apart from the first position by a distance that is less than a smallest line width of the photo mask. 
     
     
       19. The method of  claim 12  wherein forming at least one material layer for each position of the photo mask comprises forming a layer of material having openings, the openings to allow portions of the first electrode to electrically contact portions of the second electrode. 
     
     
       20. The method of  claim 12  wherein forming at least one material layer comprises forming at least one semiconductor or dielectric layer. 
     
     
       21. A method comprising:
 fabricating an electronic device on a substrate using a photolithography process, including defining boundaries of components of the electronic device by positioning a photo mask at a position relative to the substrate, and shifting an alignment of the photo mask according to a sequence of steps when defining boundaries of different components, in which the smallest distance of shift during the sequence of steps is smaller than a smallest line width of the electronic device. 
 
     
     
       22. The method of  claim 21 , comprising forming layers of materials as the photo mask is shifted according to the sequence of steps to form material layers that are offset from one another to form components having different layers or different combinations of layers. 
     
     
       23. An apparatus comprising:
 a lithography system comprising
 a wafer stage to support a wafer, 
 a photo mask stage to support a photo mask, 
 at least one stepper motor to drive the photo mask stage, 
 a programmable controller to control the at least one stepper motor to move the photo mask stage according to a sequence of steps to fabricate sub-cells of memory cells on the wafer, each of some of the steps involving a movement of the photo mask stage for a distance less than the smallest line width of the photo mask such that the sub-cells have dimensions smaller than the smallest line width of the photo mask, and 
 a storage storing instructions that when executed cause the programmable controller to control the at least one stepper motor to move the photo mask stage according to the sequence of steps to fabricate memory cells each having a plurality of sub-cells. 
 
 
     
     
       24. The apparatus of  claim 23  wherein the instructions when executed cause the programmable controller to control the at least one stepper motor to move the photo mask stage to position the photo mask at various locations to cause a first material layer to be formed at a position that is offset a distance relative to a position of a second material layer, forming a first sub-cell that includes the first material layer but not the second material layer, and a second sub-cell that includes both the first and second material layers, the offset distance being less than the smallest line width of the photo mask. 
     
     
       25. An apparatus comprising:
 means for defining boundaries of sub-cells of memory cells of a memory device by positioning a photo mask at a position relative to a substrate on which the memory device is fabricated, and 
 means for shifting alignment of the photo mask according to a sequence of steps in which the smallest distance of shift during the sequence of steps is smaller than a smallest width of the memory cell.