Programmable settling for high speed analog to digital converter

Abstract

In an embodiment, an apparatus and method reduces a calibration settling time in an analog-to-digital converter (ADC). The ADC has a reference voltage supply. The reference voltage supply has an output. A filter capacitor is coupled to the reference voltage supply output. An isolation transistor is series-coupled between the filter capacitor and ground. The isolation transistor isolates the filter capacitor during calibration of the ADC.

1. A method for varying a calibration signal bandwidth in an analog-to-digital converter, comprising:
 identifying a calibration mode; and 
 during the calibration mode, adjusting a bandwidth-adjustable filter to process the calibration signal at a first bandwidth that is greater than a second bandwidth, wherein the second bandwidth is associated with an analog-to-digital conversion mode. 
 
     
     
       2. The method of  claim 1 , wherein the adjusting comprises disabling a low-pass filter that represents the bandwidth-adjustable filter. 
     
     
       3. The method of  claim 2 , wherein the disabling comprises shorting a resistor and isolating a capacitor. 
     
     
       4. The method of  claim 1 , further comprising using a track-and-hold circuit common mode voltage signal as the calibration signal. 
     
     
       5. The method of  claim 1 , further comprising using a preamplifier reference voltage signal as the calibration signal. 
     
     
       6. The method of  claim 1 , wherein the varying further comprises using a low-pass filter as the bandwidth-adjustable filter. 
     
     
       7. The method of  claim 1 , further comprising:
 identifying the analog-to-digital conversion mode; and 
 varying the bandwidth-adjustable filter to process the calibration signal, during the analog-to-digital conversion mode, at the second bandwidth. 
 
     
     
       8. The method of  claim 7 , further comprising low-pass filtering the calibration signal. 
     
     
       9. An apparatus for varying a calibration signal bandwidth in an analog-to-digital converter, comprising:
 means for identifying a calibration mode; and 
 a bandwidth-adjustable filter coupled to the means for identifying and configured to process a calibration signal at a first bandwidth that is greater than a second bandwidth during the calibration mode, wherein the second bandwidth is associated with an analog-to-digital conversion mode. 
 
     
     
       10. The apparatus of  claim 9 , wherein the bandwidth-adjustable filter comprises a low-pass filter and the apparatus further comprises means for disabling the low-pass filter. 
     
     
       11. The apparatus of  claim 10 , wherein the means for disabling comprises means for shorting a resistor and isolating a capacitor. 
     
     
       12. The apparatus of  claim 9 , further comprising means for using a track-and-hold circuit common mode voltage signal as the calibration signal. 
     
     
       13. The apparatus of  claim 9 , further comprising means for using a preamplifier reference voltage signal as the calibration signal. 
     
     
       14. The apparatus of  claim 9 , wherein the bandwidth-adjustable filter comprises a low-pass filter. 
     
     
       15. The apparatus of  claim 9 , further comprising:
 means for identifying the analog-to-digital conversion mode; and 
 means for varying the bandwidth-adjustable filter to process the calibration signal, during the analog-to-digital conversion mode, at the second bandwidth. 
 
     
     
       16. A method for varying a calibration signal bandwidth in an analog-to-digital converter, comprising:
 adjusting a bandwidth-adjustable filter during the calibration mode to process the calibration signal at a first bandwidth that is greater than a second bandwidth, wherein the second bandwidth is associated with an analog-to-digital conversion mode; and 
 varying the bandwidth-adjustable filter during the analog-to-digital conversion mode to process the calibration signal at the second bandwidth. 
 
     
     
       17. The method of  claim 16 , further comprising using a track-and-hold circuit common mode voltage signal as the calibration signal. 
     
     
       18. The method of  claim 16 , further comprising using a preamplifier reference voltage signal as the calibration signal. 
     
     
       19. The method of  claim 16 , wherein the adjusting comprises disabling a low-pass filter that represents the bandwidth-adjustable filter. 
     
     
       20. The method of  claim 19 , wherein the disabling comprises shorting a resistor and isolating a capacitor.