Semiconductor mount

Abstract

A mount for a semiconductor device has a first surface with at least one contact region and a second surface. The mount has a substrate to receive the second surface of the semiconductor device and a planar element. The planar element has an aperture sized to surround the semiconductor. A first surface of the planar element is mounted to the substrate and is located to surround the semiconductor device such that the semiconductor device is aligned by the aperture. The mount further has means for mounting the semiconductor device to the substrate in an aligned position. Some embodiments include a method of making and/or using such a mount.

1. A mount for a semiconductor device, the semiconductor device having a first surface, at least one contact region and a second surface, the mount comprising:
 a. a first electrically conductive substrate having a first surface to receive the second surface of the semiconductor device; 
 b. an element having an aperture sized to surround the semiconductor device; and 
 c. a second thermally conductive substrate to receive a second surface of the first electrically conductive substrate; 
 wherein a first surface of the element is mounted to the substrate and is located to surround the semiconductor device; 
 wherein the semiconductor device comprises an energy conversion type cell. 
 
     
     
       2. The mount according to  claim 1 , wherein the element is mounted to the substrate in a predetermined location. 
     
     
       3. The mount according to  claim 1 , wherein the element comprises a flexible electrically insulated material. 
     
     
       4. The mount according to  claim 1 , wherein the element further includes at least one conductive trace electrically coupled to the at least one contact region. 
     
     
       5. The mount according to  claim 1 , wherein the element comprises a plurality of apertures each adapted to receive a semiconductor device. 
     
     
       6. The mount according to  claim 1 , wherein the semiconductor device is coupled to the element with a reflowed solder. 
     
     
       7. The mount according to  claim 1 , wherein the semiconductor device is coupled to the first electrically conductive substrate with a reflowed solder. 
     
     
       8. The mount of  claim 1 ,
 wherein the at least one contact region of the semiconductor device comprises a negative terminal; 
 wherein the element comprises a first conductive trace for the negative terminal; and 
 wherein the element is configured to position the first conductive trace in relation to the negative terminal. 
 
     
     
       9. A method of mounting a semiconductor device having a first surface, at least one contact region and a second surface, the method comprising:
 providing a first electrically conductive substrate adapted to receive the second surface of the semiconductor device; 
 coupling the semiconductor device to the first electrically conductive substrate; and 
 providing a second thermally conductive substrate to receive a second surface of the first electrically conductive substrate; 
 wherein the semiconductor device comprises an energy conversion type cell. 
 
     
     
       10. The method according to  claim 9 , further comprising the step of reflowing solder to couple the semiconductor device to the first electrically conductive substrate. 
     
     
       11. The method according to  claim 9 , further comprising:
 providing a negative terminal by using the first surface of the semiconductor device; 
 providing a positive terminal by using the second surface of the semiconductor device; 
 positioning a first conductor for the negative terminal; 
 positioning a second conductor for the positive terminal; 
 insulatively separating the first and second conductors by using the element; 
 coupling the first conductor to the negative terminal; and 
 coupling the second conductor to the positive terminal. 
 
     
     
       12. The method according to  claim 9 , further comprising the step of providing an element having an aperture sized to surround the semiconductor device. 
     
     
       13. The method according to  claim 12 , including the step of mounting the element to the first electrically conductive substrate in a predetermined location. 
     
     
       14. The method according to  claim 12 , including the step of forming at least one conductive trace in the element, wherein at least the one conductive trace is electrically coupled to the at least one contact region. 
     
     
       15. The method according to  claim 12 , further comprising the step of forming a plurality of apertures in the element each adapted to receive and align a semiconductor device. 
     
     
       16. A method of mounting an energy conversion cell comprising the steps of:
 placing the cell near a predetermined location on an electrically conductive substrate wherein the cell includes at least one exposed contact region; and 
 mounting an element to the electrically conductive substrate, the element having an aperture sized to surround the cell; wherein the element further includes at least one conductive trace electrically coupled to the at least one exposed contact region. 
 
     
     
       17. The method according to  claim 16 , wherein the element is mounted to the electrically conductive substrate in a predetermined location. 
     
     
       18. The method according to  claim 16 , further comprising the step of forming an electrical connection between the at least one exposed contact region and a conductive trace located on the element.