US7855602B2ActiveUtilityPatentIndex 61
Amplifier arrangement and signal generation method
Est. expiryApr 8, 2028(~1.8 yrs left)· nominal 20-yr term from priority
H03F 2200/135H03F 2200/78H03F 2200/372H03F 1/14H03F 2203/45392H03F 1/083H03F 1/26H03F 2203/45248H03F 2200/153H03F 3/45183
61
PatentIndex Score
2
Cited by
8
References
12
Claims
Abstract
An amplifier arrangement includes an output amplifier stage (OA) comprising a stage input (SIN), a stage output (SOUT) which is coupled to a signal output (OUT) of the amplifier arrangement, and a capacitive element (CE) which couples the stage output (SOUT) to the stage input (SIN). A driver stage (DR) comprises a driver input (DIN) and a driver output (DOUT) which is coupled to the stage input (SIN). The driver stage (DR) is configured to generate a voltage potential at a driver output (DOUT) depending on an input current at the driver input (DIN) and to provide a charging current to the capacitive element (CE) being higher than the input current.
Claims
exact text as granted — not AI-modified1. An amplifier arrangement, comprising:
a signal output;
an output amplifier stage comprising:
a stage input;
a stage output coupled to the signal output;
an output transistor;
an amplifier element comprising:
an input coupled to the stage input; and
an output coupled to a control input of the output transistor, a controllable path of the output transistor coupled between a supply potential terminal and the stage output; and
a capacitive element coupling the stage output to the stage input; and
a driver stage comprising:
a driver input; and
a driver output coupled to the stage input, the driver stage configured to generate a voltage potential at the driver output depending on an input current at the driver input and to provide a charging current to the capacitive element being higher than the input current.
2. The amplifier arrangement according to claim 1 ,
wherein the driver stage comprises a further amplifier element coupled between the driver input and the driver output and comprises an impedance based feedback.
3. The amplifier arrangement according to claim 1 ,
wherein the driver stage comprises:
a driver current source;
a driver transistor with a controllable path connected in series to the driver current source and with a control input coupled to the driver input; and
an impedance element coupled between the driver input and the driver output;
wherein the series connection of the driver current source and the controllable path of the driver transistor is coupled between the supply potential terminal and a ground potential terminal, and a connection of the driver current source and the driver transistor is coupled to the driver output.
4. The amplifier arrangement according to claim 3 ,
wherein the driver stage further comprises:
a further driver current source connected in parallel to the driver current source in a switchable fashion depending on an activation signal; and
a further driver transistor connected in parallel to the driver transistor in a switchable fashion depending on the activation signal.
5. The amplifier arrangement according to claim 3 ,
wherein the driver stage comprises a further impedance element connected in series to the impedance element in a switchable fashion depending on a further activation signal.
6. The amplifier arrangement according to claim 3 ,
wherein the amplifier element of the output amplifier stage comprises:
an output current source matched to the driver current source;
a transistor being matched to the driver transistor, a controllable path of the transistor connected in series to the output current source and a control connection of the transistor coupled to the stage input; and
an inverter element coupled between the control input of the output transistor and a connection of the output current source and the transistor of the amplifier element;
wherein the series connection of the output current source and the controllable path of the transistor is coupled between the supply potential terminal and the ground potential terminal.
7. The amplifier arrangement according to claim 1 , further comprising a differential stage comprising:
a reference input for providing a reference voltage;
a comparison input coupled to the signal output; and
a comparison output coupled to the driver input;
wherein the differential stage is configured to provide a comparison current at the comparison output depending on a comparison of a voltage at the comparison input and the reference voltage.
8. A signal generation method, comprising the steps of:
providing an output amplifier stage with an output coupled to its input via a capacitive element;
providing an input current;
generating a driver voltage depending on the input current, wherein generating the driver voltage includes providing a charging current to the capacitive element being higher than the input current; and
generating an output voltage depending on the driver voltage by means of the output amplifier stage,
wherein generating the output voltage comprises controlling a current through an output transistor which is coupled to a supply potential terminal as a function of the driver voltage.
9. The signal generation method according to claim 8 ,
wherein generating the driver voltage selectively comprises increasing the charging current depending on an activation signal.
10. The signal generation method according to claim 8 ,
wherein generating the driver voltage is based on an impedance feedback.
11. The signal generation method according to claim 10 ,
wherein generating the driver voltage selectively comprises increasing an impedance of the impedance feedback depending on a further activation signal.
12. The signal generation method according to claim 8 ,
wherein the input current is provided by comparing a voltage derived from the output voltage to a reference voltage.Cited by (0)
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