Field-effect semiconductor device

Abstract

A HEMT-type field-effect semiconductor device has a main semiconductor region comprising two layers of dissimilar materials such that a two-dimensional electron gas layer is generated along the heterojunction between the two layers. A source and a drain electrode are placed in spaced positions on a major surface of the main semiconductor region. Between these electrodes, a gate electrode is received in a recess in the major surface of the main semiconductor region via a p-type metal oxide semiconductor film whereby a depletion zone is normally created in the electron gas layer, with a minimum of turn-on resistance and gate leak current.

1. A field-effect semiconductor device comprising:
 (a) a main semiconductor region having a first semiconductor layer and a second semiconductor layer placed on the first semiconductor layer, the second semiconductor layer being greater in bandgap than the first semiconductor layer, the first semiconductor layer having a two-dimensional carrier as layer of a first conductivity type, the main semiconductor region having a first and a second opposite major surface, the second semiconductor layer being disposed between the first major surface of the main semiconductor region and the first semiconductor layer; 
 (b) a first and a second main electrode disposed in spaced-apart positions on the first major surface of the main semiconductor region and electrically coupled to the two-dimensional carrier gas layer in the first semiconductor layer of the main semiconductor region; 
 (c) a gate electrode disposed between, and spaced from, the first and the second main electrode on the first major surface of the main semiconductor region for controlling conduction between the first and the second main electrode via the two-dimensional carrier gas layer; and 
 (d) a metal oxide semiconductor film disposed between the gate electrode and the main semiconductor region, and having a second conductivity type opposite to the first conductivity type. 
 
     
     
       2. A field-effect semiconductor device as defined in  claim 1 , wherein the main semiconductor region has formed therein a recess extending from the first major surface of the semiconductor region and terminating short of the first semiconductor layer, and wherein the gate electrode is received in the recess via the metal oxide semiconductor film. 
     
     
       3. A field-effect semiconductor device as defined in  claim 2 , wherein the second semiconductor layer has part underlying the recess therein, and wherein the underlying part of the second semiconductor layer is so thick that the two-dimensional carrier gas layer is formed without the depletion zone in the absence of the metal oxide semiconductor film, and that the two-dimensional carrier gas layer has the depletion zone formed therein in the presence of the metal oxide semiconductor film. 
     
     
       4. A field-effect semiconductor device as defined in  claim 2 , wherein the main semiconductor region further comprises a third semiconductor layer on the second semiconductor layer, the third semiconductor layer being higher in carrier density than the second semiconductor layer, and wherein the recess is formed in at least part of the third semiconductor layer of the main semiconductor region. 
     
     
       5. A field-effect semiconductor device as defined in  claim 4 , wherein the first semiconductor layer of the main semiconductor region is of a nitride semiconductor, wherein the second semiconductor layer of the main semiconductor region is of a nitride semiconductor containing aluminum, and wherein the third semiconductor layer of the main semiconductor region is of a nitride semiconductor containing a greater proportion of aluminum than the second semiconductor layer. 
     
     
       6. A field-effect semiconductor device as defined in  claim 5 , wherein the main semiconductor region further comprises a fourth semiconductor layer on the third semiconductor layer, the fourth semiconductor layer being of a nitride semiconductor having an aluminum proportion less than that of the third semiconductor layer, and wherein the recess is formed at least in the third and the fourth semiconductor layer. 
     
     
       7. A field-effect semiconductor device as defined in  claim 4 , wherein the main semiconductor region further comprises a fourth semiconductor region on the third semiconductor layer, the fourth semiconductor layer being of a nitride semiconductor having an aluminum proportion less than that of the third semiconductor layer, and a fifth semiconductor layer on the fourth semiconductor layer, the fifth semiconductor layer being of a nitride semiconductor having an aluminum proportion less than that of the fourth semiconductor layer and containing a dopant that determines a conductivity type opposite to that of the metal oxide semiconductor film, and wherein the recess is formed at least in the third and the fourth and the fifth semiconductor layer. 
     
     
       8. A field-effect semiconductor device as defined in  claim 1 , wherein the main semiconductor region has a two-dimensional electron gas layer generated therein, and wherein the metal oxide semiconductor film is of p-type. 
     
     
       9. A field-effect semiconductor device as defined in  claim 8 , wherein the p-type metal oxide semiconductor film is made from at least one metal oxide selected from the group consisting of nickel oxide, iron oxide, cobalt oxide, manganese oxide, and copper oxide. 
     
     
       10. A field-effect semiconductor device as defined in  claim 8 , wherein the p-type metal oxide semiconductor film is of nickel oxide, and wherein the gate electrode is a lamination of a nickel layer and a gold layer, with the nickel layer being contiguous to the p-type metal oxide semiconductor layer. 
     
     
       11. A field-effect semiconductor device as defined in  claim 8 , wherein the p-type metal oxide semiconductor film is a lamination of a plurality of layers of dissimilar p-type metal oxide semiconductors. 
     
     
       12. A field-effect semiconductor device as defined in  claim 8 , wherein the p-type meal oxide semiconductor film varies in hole density in a direction normal to the first major surface of the main semiconductor region. 
     
     
       13. A field-effect semiconductor device as defined in  claim 1 , wherein the main semiconductor region further comprises a spacer between the first and the second semiconductor layer, the spacer being thinner than the second semiconductor layer and containing aluminum in a higher proportion than the second semiconductor layer. 
     
     
       14. A field-effect semiconductor device as defined in  claim 1 , further comprising an insulating film covering at least parts of the first major surface of the main semiconductor region between the first main electrode and the gate electrode and between the second main electrode and the gate electrode. 
     
     
       15. A field-effect semiconductor device as defined in  claim 14 , further comprising a field plate disposed on the first major surface of the main semiconductor region via the insulating film and coupled to the gate electrode. 
     
     
       16. A field-effect semiconductor device as defined in  claim 15 , wherein the insulating film has slanting side surfaces underlying the field plate. 
     
     
       17. A field-effect semiconductor device as defined in  claim 1 , wherein the gate electrode is electrically coupled to the first main electrode whereby the device is adapted for diode-like operation. 
     
     
       18. A field-effect semiconductor device comprising:
 a main semiconductor region having a first semiconductor layer and a second semiconductor layer placed on the first semiconductor layer, the second semiconductor being greater in bandgap than the first semiconductor layer, the first semiconductor layer having a two-dimensional carrier as layer, the main semiconductor region having a first and a second semiconductor layer being disposed between the first major surface of the main semiconductor region and the first semiconductor layer; 
 a first and a second main electrode disposed in spaced-apart positions on the first major surface of the main semiconductor region and electrically coupled to the two-dimensional carrier as layer in the first semiconductor layer of the main semiconductor region; 
 a gate electrode disposed between, and spaced from, the first and the second main electrode on the first major surface of the main semiconductor region for controlling conduction between the first and the second main electrode via the two-dimensional carrier gas layer; and 
 (d) a metal oxide semiconductor film disposed between the gate electrode and the main semiconductor region, 
 wherein the metal oxide semiconductor film is made from at least one metal oxide selected from the group consisting of nickel oxide, iron oxide, cobalt oxide, manganese oxide, and copper oxide.