High dielectric constant materials

Abstract

An integrated circuit can be formed with a high-k dielectric layer. A first titanium oxide layer is deposited over a substrate using a first ALD process. A first metal oxide layer is also deposited over the substrate using a second ALD process. A second titanium oxide layer is deposited over the substrate using a third ALD process and a second metal oxide layer is deposited over the substrate using a fourth ALD process. The first and second metal oxides are preferably strontium oxide and/or aluminum oxide.

What is claimed is: 
     
       1. A method of forming an integrated circuit with a high-k dielectric layer, the method comprising:
 depositing a first titanium oxide layer over a substrate, the first titanium oxide layer being deposited by a first ALD process; 
 depositing a first strontium oxide layer over the substrate, the first strontium oxide layer being deposited by a second ALD process; 
 depositing a second titanium oxide layer over the substrate, the second titanium oxide layer being deposited by a third ALD process; 
 depositing a second strontium oxide layer over the substrate, the second strontium oxide layer being deposited by a fourth ALD process, wherein the titanium oxide layers and the strontium oxide layers are deposited in an alternating manner; and 
 depositing a strontium nitride layer by a fifth ALD process. 
 
     
     
       2. The method according to  claim 1 , wherein the second ALD process is performed before the first ALD process and the fourth ALD process is performed before the third ALD process. 
     
     
       3. The method according to  claim 1 , further comprising a thermal treatment performed after completion of depositing the first and second strontium oxide layers and the first and second titanium oxide layers. 
     
     
       4. The method according to  claim 3 , wherein the thermal treatment is performed at a temperature suitable for at least partially intermixing the first and second strontium oxide layers and the first and second titanium oxide layers. 
     
     
       5. The method according to  claim 1 , further comprising performing a nitridation step after completion of depositing the first and second titanium oxide layers and the first and second strontium oxide layers. 
     
     
       6. The method according to  claim 1 , wherein each of the layers is deposited to a thickness between 0.5 nm and 4 nm. 
     
     
       7. The method according to  claim 1 , wherein depositing a titanium oxide layer and a strontium oxide layer form an ALD deposition cycle, and the ALD deposition cycle is repeated at least twice. 
     
     
       8. The method according to  claim 1 , further comprising depositing a first metal electrode before depositing the high-k dielectric layer, and depositing a second metal electrode after depositing the high-k dielectric layer. 
     
     
       9. The method according to  claim 1 , wherein the first ALD process is performed before the second ALD process and the third ALD process is performed before the fourth ALD process. 
     
     
       10. The method according to  claim 1 , wherein the fifth ALD process is performed after the second ALD process and before the third ALD process. 
     
     
       11. A method of forming an integrated circuit with a high-k dielectric layer, the method comprising:
 depositing a first titanium oxide layer over a substrate, the first titanium oxide layer being deposited by a first ALD process; 
 depositing a first aluminum oxide layer over the substrate, the first aluminum oxide layer being deposited by a second ALD process; 
 depositing a second titanium oxide layer over the substrate, the second titanium oxide layer being deposited by a third ALD process; 
 depositing a second aluminum oxide layer over the substrate, the second aluminum oxide layer being deposited by a fourth ALD process, wherein the titanium oxide layers and the aluminum oxide layers are deposited in an alternating manner; 
 depositing a first aluminum nitride layer over the substrate, the first aluminum nitride layer being deposited by a fifth ALD process, wherein the fifth ALD process is performed before one or more of the first, second, third and fourth ALD processes; and 
 thermally treating the titanium oxide layers, the aluminum oxide layers and the first aluminum nitride layer, after completion of depositing the titanium oxide layers, the aluminum oxide layers and the first aluminum nitride layer, to form a mixed compound layer that includes Ti, Al, O and N. 
 
     
     
       12. The method according to  claim 11 , wherein the second ALD process is performed before the first ALD process and the fourth ALD process is performed before the third ALD process. 
     
     
       13. The method according to  claim 11 , wherein each of the layers is deposited to a thickness between 0.5 nm and 4 nm. 
     
     
       14. The method according to  claim 11 , wherein depositing a titanium oxide layer and an aluminum oxide layer form an ALD deposition cycle, and the ALD deposition cycle is repeated at least twice. 
     
     
       15. The method according to  claim 11 , further comprising depositing a first metal electrode before depositing the high-k dielectric layer, and depositing a second metal electrode after depositing the high-k dielectric layer. 
     
     
       16. The method according to  claim 11 , wherein thermally treating the layers comprises a rapid thermal anneal. 
     
     
       17. The method according to  claim 11 , wherein the first ALD process is performed before the second ALD process and the third ALD process is performed before the fourth ALD process. 
     
     
       18. The method according to  claim 11 , wherein the fifth ALD process is performed between the first ALD process and the second ALD process. 
     
     
       19. The method according to  claim 18 , further comprising depositing a second aluminum nitride layer over the substrate, the second aluminum nitride layer being deposited by a sixth ALD process, wherein the sixth ALD process is performed between the third ALD process and the fourth ALD process.