Integrated circuit having wide power lines

Abstract

A semiconductor integrated circuit device described herein includes a semiconductor chip and a package on which the semiconductor chip is disposed. The semiconductor chip includes first electrode pads, and the package includes second electrode pads connected to the first electrode pads. The second electrode pads include signal pads and power supply pads, and are arranged in rows along the semiconductor chip. All the power supply pads of the second electrode pads are for supplying power to the semiconductor chip and are disposed in a row positioned farther from the semiconductor chip than another row. Each power supply line that leads out from a second power supply pad has a width not less than a width of the second power supply pad.

1. A semiconductor integrated circuit device comprising:
 a semiconductor chip that includes first electrode pads; and 
 a package on which the semiconductor chip is disposed, the package including second electrode pads connected to the first electrode pads, the second electrode pads including signal pads and power supply pads, and the second electrode pads being arranged in a plurality of rows along the semiconductor chip, 
 wherein all of the power supply pads of the second electrode pads are for supplying power to the semiconductor chip and are disposed in a row positioned farther from the semiconductor chip than another row of the plurality of rows, and 
 wherein each power supply line that leads out from a second power supply pad has a width not less than a width of the second power supply pad. 
 
     
     
       2. The semiconductor integrated circuit device according to  claim 1 , wherein the second electrode pads are arranged in the plurality of rows in a staggered manner. 
     
     
       3. The semiconductor integrated circuit device according to  claim 1 ,
 wherein the package is a BGA package that includes a plurality of rows of ball lands, 
 wherein the plurality of rows of ball lands include power supply lands connected via power supply lines to the power supply pads and signal lands connected via signal lines to the signal pads, and 
 wherein the power supply lands are disposed in a row of the plurality rows located closest to the power supply pads. 
 
     
     
       4. The semiconductor integrated circuit device according to  claim 1 ,
 wherein the package is a BGA package that includes a plurality of rows of ball lands, 
 wherein the plurality of rows of ball lands includes power supply lands connected via power supply lines to the power supply pads and signal lands connected via signal lines to the signal pads, 
 wherein the power supply pads are connected to power supply lands disposed in a row of the plurality of rows located closest to the power supply pads, and 
 wherein power supply lands other than the power supply lands disposed in the row located closest to the power supply pads are connected to power supply lands disposed in the row located closest to the power supply pads.