US7965108B2ActiveUtilityPatentIndex 93
Frequency synthesizer
Est. expiryApr 26, 2027(~0.8 yrs left)· nominal 20-yr term from priority
H03L 7/0893H03L 7/193H03L 7/099H03K 3/356043H03L 7/0891H03L 7/085H03L 7/18H03B 5/1212H03K 23/667H03L 7/087
93
PatentIndex Score
28
Cited by
19
References
5
Claims
Abstract
A frequency synthesizer. The frequency synthesizer comprises a harmonic locked phase/frequency detector, a low pass filter, a voltage controlled oscillator, and a frequency divider. The harmonic locked phase/frequency detector receives a reference signal and a divided signal. The low pass filter is coupled to the harmonic locked phase/frequency detector. The voltage controlled oscillator is coupled to the low pass filter and provides an output signal. The frequency divider is coupled between the voltage controlled oscillator and the harmonic locked phase/frequency detector. Frequency of the divided signal is a harmonic frequency of the reference signal.
Claims
exact text as granted — not AI-modified1. A locked phase/frequency detector, comprising:
a D flip-flop, receiving a first input signal at a data input terminal thereof and a second input signal at a clock input terminal thereof;
an XOR gate, receiving the first input signal and an inverting output signal of the D flip-flop;
a first current source coupled between a supply voltage and an output node, controlling by an output signal of the XOR gate; and
a second current source coupled between the output node and a ground, controlling by the second input signal, wherein the output node is arranged to provide a detection signal to indicate whether phase or frequency of the second input signal is locked to that of the first input signal.
2. The locked phase/frequency detector as claimed in claim 1 , wherein frequency of the second input signal is proportional to frequency of the first input signal.
3. The locked phase/frequency detector as claimed in claim 1 , wherein frequency of the second input signal is a harmonic frequency of the first input signal.
4. The locked phase/frequency detector as claimed in claim 1 , wherein the detection signal indicates that the phase or frequency of the second input signal is locked to that of the first input signal when the output signal of the XOR gate is identical to the second input signal.
5. The locked phase/frequency detector as claimed in claim 1 , wherein frequency of the second input signal is larger than frequency of the first input signal.Cited by (0)
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