Thin film transistor, method of fabricating a thin film transistor and flat panel display device having the same

Abstract

A thin film transistor (TFT) includes a substrate, a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide and exhibiting a charge concentration of about 1×10 14 atom/cm 3 to about 1×10 17 atom/cm 3 , a gate electrode on the substrate, a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer, and source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer.

1. A thin film transistor (TFT), comprising:
 a substrate; 
 a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide, the transparent semiconductor layer being an atomic deposition layer with a charge concentration of about 1×10 14  atom/cm 3  to about 1×10 17  atom/cm 3 ; 
 a gate electrode on the substrate; 
 a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer; and 
 source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer. 
 
     
     
       2. The TFT as claimed in  claim 1 , wherein the transparent semiconductor layer is between the substrate and the gate insulating layer. 
     
     
       3. The TFT as claimed in  claim 2 , further comprising an interlayer insulating layer on the substrate, the gate insulating layer, gate electrode, and interlayer insulating layer being sequentially stacked on the transparent semiconductor layer, and the source and drain electrodes being connected to the transparent semiconductor layer through the gate insulating layer and interlayer insulating layer. 
     
     
       4. The TFT as claimed in  claim 1 , wherein the gate electrode is disposed between the substrate and the gate insulating layer. 
     
     
       5. The TFT as claimed in  claim 4 , wherein the source and drain electrodes are spaced apart from each other on the gate insulating layer, the source and drain electrodes being disposed to correspond to both sides of the gate electrode, and the transparent semiconductor layer being on the source and drain electrodes and including a portion on the gate insulating layer between the source and drain electrodes. 
     
     
       6. The TFT as claimed in  claim 1 , wherein the substrate includes one or more of a single crystalline silicon, glass, plastic, sapphire and quartz. 
     
     
       7. The TFT as claimed in  claim 1 , wherein the transparent semiconductor layer has a thickness of about 30 nm to about 150 nm. 
     
     
       8. The TFT as claimed in  claim 1 , wherein the transparent semiconductor layer is a p-type semiconductor layer. 
     
     
       9. A method of fabricating a thin film transistor (TFT), comprising:
 forming a transparent semiconductor layer on a substrate by atomic layer deposition, the transparent semiconductor layer including zinc oxide and exhibiting a charge concentration of about 1×10 14  atom/cm 3  to about 1×10 17  atom/cm 3 ; 
 forming a gate electrode on the substrate; 
 forming a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer; and 
 forming source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer. 
 
     
     
       10. The method as claims in  claim 9 , further comprising:
 forming a buffer layer on the substrate; 
 forming a zinc oxide layer on the buffer layer by atomic layer deposition using an oxidizing agent having nitrogen; 
 forming the transparent semiconductor layer by patterning the zinc oxide layer, a channel region of the transparent semiconductor layer having a charge concentration of about 1×10 14  atom/cm 3  to about 1×10 17  atom/cm 3 ; 
 forming the gate insulating layer on the transparent semiconductor layer; 
 forming the gate electrode on the gate insulating layer; 
 forming an interlayer insulating layer on the gate electrode; and 
 forming the source and drain electrodes on the interlayer insulating layer, one of the source and drain electrodes being connected to a first electrode. 
 
     
     
       11. The method as claimed in  claim 10 , wherein the oxidizing agent includes one or more of ammonium hydroxide, nitrogen monoxide, nitrogen dioxide and nitric acid. 
     
     
       12. The method as claims in  claim 9 , further comprising:
 forming the gate electrode on the substrate; 
 forming the gate insulating layer on the gate electrode; 
 forming the source and drain electrodes on the gate insulating layer, the source and drain electrodes being spaced apart from each and disposed to correspond to both sides of the gate electrode; 
 forming a zinc oxide layer on the source and drain electrodes by atomic layer deposition using an oxidizing agent having nitrogen; and 
 patterning the zinc oxide layer to form the transparent semiconductor layer, the transparent semiconductor layer being connected with the source and drain electrodes and having a charge concentration of about 1×10 14  atom/cm 3  to about 1×10 17 atom/cm 3  in a channel region thereof. 
 
     
     
       13. The method as claimed in  claim 12 , wherein the oxidizing agent includes one or more of ammonium hydroxide, nitrogen monoxide, nitrogen dioxide and nitric acid. 
     
     
       14. A flat panel display (FPD) device, comprising:
 a thin film transistor (TFT), including:
 a substrate, 
 
 a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide, the transparent semiconductor layer being an atomic deposition layer with a charge concentration of about 1×10 14  atom/cm 3  to about 1×10 17  atom/cm 3 ,
 a gate electrode on the substrate, 
 
 a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer, and 
 source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer; and 
 a pixel part including at least one pixel and being in electrical communication with the TFT via at least one of the source and drain electrodes of the TFT. 
 
     
     
       15. The flat panel display device as claimed in  claim 14 , wherein the transparent semiconductor layer of the TFT has a thickness of about 30 nm to about 150 nm. 
     
     
       16. The FPD device as claimed in  claim 14 , wherein the FPD is an organic light emitting diode (OLED) display device.