P
US8006040B2ExpiredUtilityPatentIndex 56

Data storage device and method thereof

Assignee: TOSHIBA KKPriority: Mar 13, 2006Filed: Mar 13, 2007Granted: Aug 23, 2011
Est. expiryMar 13, 2026(expired)· nominal 20-yr term from priority
Inventors:SASAMOTO KYOICHI
G06F 12/0866G06F 12/0862G06F 2212/6026
56
PatentIndex Score
3
Cited by
8
References
23
Claims

Abstract

A microprocessor 18 in a control device 13 of a data storage device determines that the read request has a sequential access property, when a transfer size of data specified by a read request from a host computer 11 is the same as a preset pre-fetch determination size and sends the data for the read request to the host computer 11 . The microprocessor 18 also reads data in succeeding areas continuous to the data designated by the read request from a storage device 12 into a cache memory 20 . The data storage device enables to reduce a number of access from the control device 13 to the storage device 12 , improving a response time as well as throughput of the data storage device.

Claims

exact text as granted — not AI-modified
1. A data storage device, comprising a storage device having a single or a plurality of storage media storing data to be processed in a host computer; and a control device connected to the storage device and the host computer to control data transfer there between, wherein the control device further comprises:
 a first interface control circuit for controlling a connection to the host computer, 
 a second interface control circuit for controlling a connection to the storage device, 
 a microprocessor connected to the first and the second interface control circuits, 
 a local memory connected to the microprocessor, and 
 a cache memory connected to the microprocessor, 
 wherein the microprocessor:
 determines a transfer size of a read request from the host computer, the transfer size indicating (i) an amount of data requested by the read request, and (ii) that the read request has a sequential access property; 
 compares the transfer size of the read request with a preset pre-fetch determination size; 
 determines that the read request has the sequential access property when the transfer size of the read request is the same as the preset pre-fetch determination size, 
 stores data designated by the read request in a first storage area in the cache memory, 
 sends the data designated by the read request to the host computer, and 
 pre-fetches, in response to the determination that the read request has the sequential access property, data to a second storage area in the cache memory succeeding the data designated by the read request stored in the first storage area. 
 
 
     
     
       2. The data storage device according to  claim 1 , wherein the preset pre-fetch determination size is a divided size peculiar to a system. 
     
     
       3. The data storage device according to  claim 2 , wherein the preset pre-fetch determination size is equal to  2   n  KB. 
     
     
       4. The data storage device according to  claim 1 , wherein the microprocessor has a plurality of different sizes of the preset pre-fetch determination sizes, and it determines that the read request has a sequential access property when the transfer size of the read request from the host computer is equal to any of the plurality of preset pre-fetch determination sizes. 
     
     
       5. The data storage device according to  claim 1  or  4 , wherein the microprocessor determines whether or not pre-fetch should be performed in response to a hit rate of data which has been pre-fetched into the cache memory by the host computer. 
     
     
       6. The data storage device according to  claim 5 , wherein the hit rate is determined by the microprocessor by a request count value which is incremented when the transfer size of the read request from the host computer is equal to one or n number of preset pre-fetch determination sizes, and by a hit count value which is incremented when the data of the read request from the host computer has been read in the cache memory. 
     
     
       7. The data storage device according to  claim 5 , wherein the microprocessor varies the pre-fetch determination size in response to the hit rate of the data, which is pre-fetched into the cache memory by the host computer. 
     
     
       8. The data storage device according to  claim 7 , wherein the microprocessor integrally reads the data designated by the read request from the host computer and the data to be pre-fetched by issuing a read request designating data size equal to a sum of the both data to the storage device, when the microprocessor reads data from the storage device in accordance with the read request from the host computer. 
     
     
       9. The data storage device according to  claim 1 , wherein the microprocessor issues a read request with a size designated by a read request from the host computer at first to read the data into the cache memory, and then it issues a new read request designating a size of pre-fetch data to the storage device to read the pre-fetch data into the cache memory, when the microprocessor reads data designated by the read request from the host computer. 
     
     
       10. The data storage device according to  claim 9 , wherein a size of the pre-fetch data is n-times a size of the preset pre-fetch determination size. 
     
     
       11. The data storage device according to  claim 10 , wherein the pre-fetch data size is determined in response to a data structure for a plurality of storage devices-when the plurality of storage devices are managed under a redundant array of independent disks (RAID) function. 
     
     
       12. A data storage method which stores data to be processed by a host computer in a single or a plurality of storage media and controls data transfer between the host computer and the storage device through a cache memory comprising the steps of:
 determining whether or not data of a read request has been read in the cache memory when the read request is issued from the host computer; 
 sending the data to the host computer when the data of the read request is in the cache memory; 
 determining a transfer size of the data of the read request when the data of the read request is not in the cache memory, the transfer size indicating (i) an amount of data requested by the read request, and (ii) that the read request has a sequential access property; 
 comparing the transfer size with a preset pre-fetch determination size; 
 reading the data of the read request from the host computer into the cache memory to send it to the host computer when the transfer size of the data of the read request from the host computer is not the same as the preset pre-fetch determination size; 
 reading data of the read request into a first storage area in the cache memory to send to the host computer as well as pre-fetching data into a second storage area in the cache memory succeeding the first storage area when the transfer size of the data of the read request from the host computer is the same as the preset pre-fetch determination size. 
 
     
     
       13. The data storage method according to  claim 12 , wherein the preset pre-fetch determination size is a divided size peculiar to a system. 
     
     
       14. The data storage method according to  claim 13 , wherein the preset pre-fetch determination size is equal to 2 n  KB. 
     
     
       15. The data storage method according to  claim 12 , wherein a microprocessor has a plurality of different size of the preset pre-fetch determination sizes, the method further comprising:
 determining that the read request has a sequential access property when the transfer size of the read request from the host computer is equal to any of the plurality of preset pre-fetch determination sizes. 
 
     
     
       16. The data storage method according to  claim 15 , further comprising:
 determining whether or not pre-fetch should be performed in response to a hit rate of data which has been pre-fetched into the cache memory by the host computer. 
 
     
     
       17. The data storage method according to  claim 16 , wherein the hit rate is determined by the microprocessor by a request count value which is incremented when the transfer size of the read request from the host computer is equal to one or n number of preset pre-fetch determination sizes, and by a hit count value which is incremented when the data of the read request from the host computer has been read in the cache memory. 
     
     
       18. The data storage method according to  claim 16 , further comprising:
 varying the pre-fetch determination size in response to the hit rate of the data, which is pre-fetched into the cache memory by the host computer. 
 
     
     
       19. The data storage device according to  claim 18 , wherein the microprocessor integrally reads the data designated by the read request from the host computer and the data to be pre-fetched by issuing a read request designating data size equal to a sum of the both data to the storage device, when the microprocessor reads data from the storage device in accordance with the read request from the host computer. 
     
     
       20. A data storage method which stores data to be computed by a host computer in a single or a plurality of storage media, and controls data transfer between the host computer and the storage device through a cache memory, comprising steps of:
 determining whether or not data of a first read request has been read in the cache memory when the first read request is issued from the host computer; 
 sending the data to the host computer when the data of the first read request is in the cache memory; 
 determining a transfer size of the data of the first read request when the data of the first read request is not in the cache memory, the transfer size indicating (i) an amount of data requested by the read request, and (ii) that the first read request has a sequential access property; 
 comparing the transfer size with a preset pre-fetch determination size; 
 reading the data of the first read request from the host computer into the cache memory to send it to the host computer when the transfer size of the data of the first read request from the host computer is not the same as the preset pre-fetch determination size; and 
 integrally reading data designated by the first read request from the host computer and data to be pre-fetched, by issuing a second read request designating a data size equal to a sum of the data designated by the first read request and the data to be pre-fetched, when a microprocessor reads from the storage device in response to the first read request. 
 
     
     
       21. The data storage device according to  claim 1 , wherein the transfer size further indicates that the data of the read request is a portion of data of a larger read request. 
     
     
       22. The data storage method according to  claim 12 , wherein the transfer size further indicates that the data of the read request is a portion of data of a larger read request. 
     
     
       23. The data storage method according to  claim 20 , wherein the transfer size further indicates that the data of the read request is a portion of data of a larger read request.

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