Combo-type semiconductor integrated circuit supplied with a plurality of external voltages

Abstract

A combo semiconductor memory apparatus capable of reducing current and power consumption is provided. The semiconductor memory apparatus includes: a signal generator that generates a voltage control signal according to the level of an external voltage; and a voltage generator that pumps up the level of the external voltage in response to the voltage control signal and outputs the pumped voltage to a high-level voltage output terminal, or supplies the external voltage as a high-level voltage.

1. A semiconductor integrated circuit comprising:
 a signal generator configured to generate a voltage control signal according to a level of an external voltage; and 
 a voltage generator configured to receive the voltage control signal and to pump up the level of the external voltage to output a pumped voltage to a high-level voltage output terminal when the voltage control signal is a first level, and to directly supply the external voltage to the high-level voltage output terminal when the voltage control signal is a second level. 
 
     
     
       2. The semiconductor integrated circuit of  claim 1 ,
 wherein the signal generator is a mode register set or an extended mode register set. 
 
     
     
       3. The semiconductor integrated circuit of  claim 1 ,
 wherein the signal generator includes: 
 a fuse to which the external voltage is applied; and 
 a signal driving unit that outputs the external voltage transmitted through the fuse as the voltage control signal in response to a power-up signal. 
 
     
     
       4. The semiconductor integrated circuit of  claim 3 ,
 wherein the signal driving unit includes: 
 a first NMOS transistor that has a gate to which an inverted power-up signal is input, a drain connected to the fuse, and a source connected to a ground voltage terminal; and 
 a second NMOS transistor that has a gate to which the voltage control signal is input, a drain connected to the fuse, and a source connected to the ground voltage terminal. 
 
     
     
       5. The semiconductor integrated circuit of  claim 1 ,
 wherein the voltage generator includes: 
 a voltage supply control unit that controls a supply of the external voltage to the high-level voltage output terminal in response to the voltage control signal; and 
 a high-level voltage generating unit that determines a pumping ratio of the external voltage in response to the voltage control signal and pumps up the external voltage on the basis of the pumping ratio, to output the pumped voltage to the high-level voltage output terminal. 
 
     
     
       6. The semiconductor integrated circuit of  claim 5 ,
 wherein the voltage supply control unit includes a switching unit that supplies the external voltage to the high-level voltage output terminal in response to the voltage control signal. 
 
     
     
       7. The semiconductor integrated circuit of  claim 6 ,
 wherein the switching unit includes transistors each having a gate to which the voltage control signal is input, a drain supplied with the external voltage, and a source connected to the high-level voltage output terminal. 
 
     
     
       8. The semiconductor integrated circuit of  claim 6 ,
 wherein the voltage supply control unit further includes a current adjusting unit that adjusts an amount of current supplied from an external voltage terminal to the high-level voltage output terminal. 
 
     
     
       9. The semiconductor integrated circuit of  claim 8 ,
 wherein the current adjusting unit includes switching elements connected between the external voltage terminal and the switching unit. 
 
     
     
       10. The semiconductor integrated circuit of  claim 9 ,
 wherein the switching elements are metal switches. 
 
     
     
       11. The semiconductor integrated circuit of  claim 5 ,
 wherein the high-level voltage generating unit includes: 
 a level sensor that senses a voltage at the high-level voltage output terminal and generates an oscillator enable signal on the basis of a result of the sensing; 
 an oscillator that outputs an oscillation signal in response to the oscillator enable signal; and 
 a pumping unit that determines a boost ratio of the external voltage in response to the oscillation signal and the voltage control signal and pumps up the level of the external voltage on the basis of the boost ratio. 
 
     
     
       12. The semiconductor integrated circuit of  claim 11 ,
 wherein the pumping unit is a doubler or a tripler. 
 
     
     
       13. The semiconductor integrated circuit of  claim 11 ,
 wherein the oscillation signal includes a first oscillation signal and a second oscillation signal having different active timings, and 
 wherein the pumping unit includes: 
 a voltage supplying unit that supplies the external voltage to a first node in response to a first pumping control signal; 
 a first pump that pumps up a potential of the first node in response to a second pumping control signal and the first oscillation signal to transmit the potential of the first node to a second node; 
 a second pump that pumps up a potential of the second node in response to a third pumping control signal and the second oscillation signal to transmit the potential of the second node to the high-level voltage output terminal; and 
 a pumping control unit that controls the pumping operation of the first pump or the second pump in response to the voltage control signal to adjust the boost ratio of the external voltage. 
 
     
     
       14. The semiconductor integrated circuit of  claim 13 ,
 wherein the voltage supplying unit is a switching element that operates in response to the first pumping control signal.