Semiconductor device for output of pulse waveforms

Abstract

A semiconductor device has multiple high-side field-effect transistors and multiple low-side field-effect transistors connected to a single output terminal to generate an output signal. A driver circuit outputs driving signals that turn the field-effect transistors on and off. The driving signal for the field-effect transistors on each side is conducted by a salicided gate line with salicide block areas that produce successive delays, causing the field-effect transistors to turn on sequentially. Alternatively, the transistors have different threshold voltages, or the driving signals for different transistors are output from drivers with different driving abilities, again causing the transistors to turn on sequentially. The output signal therefore rises and falls gradually, reducing electromagnetic interference.

1. A semiconductor device comprising:
 an output terminal; 
 a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off; 
 a driver circuit for outputting a first driving signal to turn the high-side field-effect transistors on and off and a second driving signal to turn the low-side field-effect transistors on and off; 
 a first salicided signal line for conducting the first driving signal successively to the control terminals of the high-side field-effect transistors, the first salicided signal line having a first salicide block area disposed between the control terminals of each mutually adjacent pair of high-side field-effect transistors; and 
 a second salicided signal line for conducting the second driving signal successively to the control terminals of the low-side field-effect transistors, the second salicided signal line having a second salicide block area disposed between each mutually adjacent pair of low-side field-effect transistors. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the control terminals of the high-side field-effect transistors extend as stubs from the first salicided signal line, and the control terminals of the low-side field-effect transistors extend as stubs from the second salicided signal line. 
     
     
       3. The semiconductor device of  claim 1 , wherein the control terminals of the high-side field-effect transistors are in series with each first salicide block area, and the control terminals of the low-side field-effect transistors are in series with each second salicide block area. 
     
     
       4. The semiconductor device of  claim 1 , further comprising:
 a first switching element connected to the first salicided signal line in parallel with each first salicide block area; 
 a second switching element connected to the second salicided signal line in parallel with each second salicide block area; and 
 a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off. 
 
     
     
       5. The semiconductor device of  claim 4 , wherein there are at least three series circuits, at least two first switching elements, and at least two second switching elements, a programmable number of the first switching elements being left turned on when the high-side field-effect transistors are turned on, another programmable number of the second switching elements being left turned on when the low-side field-effect transistors are turned on. 
     
     
       6. The semiconductor device of  claim 1 , wherein the high-side field-effect transistors are p-channel metal-oxide-semiconductor field-effect transistors (P-MOSFETs) and the low-side field-effect transistors are n-channel metal-oxide-semiconductor field-effect transistors (N-MOSFETs), further comprising, for each series circuit in the plurality of series circuits except a series circuit closest to the driver circuit:
 a first switching element having one terminal for receiving the power supply voltage and another terminal connected to the control terminal of the high-side field-effect transistor in the series circuit; and 
 a second switching element having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in the series circuit; 
 the semiconductor device also comprising a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off. 
 
     
     
       7. The semiconductor device of  claim 1 , wherein the high-side field-effect transistors and the low-side field-effect transistors are N-MOSFETs, further comprising, for each series circuit in the plurality of series circuits except a series circuit closest to the driver circuit:
 a first switching element having one terminal connected to the output terminal and another terminal connected to the control terminal of the high-side field-effect transistor in the series circuit; and 
 a second switching element having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in the series circuit; 
 the semiconductor device also comprising a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off. 
 
     
     
       8. A semiconductor device comprising:
 an output terminal; 
 a series circuit for producing an output signal at the output terminal, the series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off; 
 a first capacitor having a first terminal and a second terminal; 
 a second capacitor having a first terminal and a second terminal; 
 a first switching element connected to the first terminal of the first capacitor; 
 a second switching element connected to the first terminal of the second capacitor; 
 a switching control circuit for controlling the first and second switching elements; 
 a first driver for outputting a first driving signal to the control terminal of the high-side field-effect transistor and a first auxiliary signal to the first terminal of the first capacitor; and 
 a second driver for outputting a second driving signal to the control terminal of the low-side field-effect transistor and a second auxiliary signal to the first terminal of the second capacitor; wherein 
 when the high-side field-effect transistor is turned on, the first driver sets the first driving signal and the first auxiliary signal to mutually identical levels and the switching control circuit turns the first switching element off; 
 when the high-side field-effect transistor is turned off, the first driver places the first auxiliary signal in a high-impedance state and the switching control circuit turns the first switching element on; 
 when the low-side field-effect transistor is turned on, the second driver sets the second driving signal and the second auxiliary signal to mutually identical levels and the switching control circuit turns the second switching element off; and 
 when the high-side field-effect transistor is turned off, the second driver places the second auxiliary signal in the high-impedance state and the switching control circuit turns the second switching element on. 
 
     
     
       9. The semiconductor device of  claim 8 , wherein:
 the low-side field-effect transistor is a first N-MOSFET; 
 the second switching element has a first terminal connected to the first terminal of the second capacitor and a second terminal for receiving the ground voltage; and 
 the second driver further comprises a first P-MOSFET, a second P-MOSFET, and a second N-MOSFET connected in series, the first P-MOSFET having a main terminal for receiving the power supply voltage, the second N-MOSFET having a main terminal for receiving the ground voltage, the second auxiliary signal being output from a node at which the first P-MOSFET and the second P-MOSFET are interconnected, the second driving signal being output from a node at which the second P-MOSFET and the second N-MOSFET are interconnected. 
 
     
     
       10. The semiconductor device of  claim 9 , wherein:
 the high-side field-effect transistor is a third P-MOSFET; 
 the first switching element has a first terminal connected to the first terminal of the first capacitor and a second terminal for receiving the power supply voltage; and 
 the first driver further comprises a fourth P-MOSFET, a third N-MOSFET, and a fourth N-MOSFET connected in series, the fourth P-MOSFET having a main terminal for receiving the power supply voltage, the fourth N-MOSFET having a main terminal for receiving the ground voltage, the first driving signal being output from a node at which the fourth P-MOSFET and the third N-MOSFET are interconnected, the first auxiliary signal being output from a node at which the third N-MOSFET and the fourth N-MOSFET are interconnected. 
 
     
     
       11. The semiconductor device of  claim 9 , wherein:
 the high-side field-effect transistor is a third N-MOSFET; 
 the first switching element has a first terminal connected to the first terminal of the first capacitor and a second terminal connected to the output terminal; and 
 the first driver further comprises a third P-MOSFET, a fourth P-MOSFET, and a fourth N-MOSFET connected in series, the third P-MOSFET having a main terminal for receiving the power supply voltage, the fourth N-MOSFET having a main terminal for receiving the ground voltage, the first auxiliary signal being output from a node at which the third P-MOSFET and the fourth P-MOSFET are interconnected, the first driving signal being output from a node at which the fourth P-MOSFET and the fourth N-MOSFET are interconnected. 
 
     
     
       12. A semiconductor device comprising:
 an output terminal; 
 a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off; 
 a driver circuit for outputting a plurality of first driving signals to the control terminals of the high-side field-effect transistors and a plurality of second driving signals to the control terminals of the low-side field-effect transistors; wherein 
 the first driving signals turn the high-side field-effect transistors on at mutually differing timings; and 
 the second driving signals turn the low-side field-effect transistors on at mutually differing timings, 
 wherein the high-side field-effect transistors have mutually identical threshold voltages, the low-side field-effect transistors have mutually identical threshold voltages, and the driver circuit further comprises: 
 a plurality of first drivers with mutually differing driving abilities for generating the first driving signals; and 
 a plurality of second drivers with mutually differing driving abilities for generating the second driving signals. 
 
     
     
       13. A semiconductor device comprising:
 an output terminal; 
 a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off; 
 a driver circuit for outputting a plurality of first driving signals to the control terminals of the high-side field-effect transistors and a plurality of second driving signals to the control terminals of the low-side field-effect transistors; wherein 
 the first driving signals turn the high-side field-effect transistors on at mutually differing timings; and 
 the second driving signals turn the low-side field-effect transistors on at mutually differing timings, 
 wherein the high-side field-effect transistors are P-MOSFETs and the low-side field-effect transistors are N-MOSFETs, further comprising: 
 a plurality of first switching elements each having one terminal for receiving the power supply voltage and another terminal connected to the control terminal the high-side field-effect transistor in one of the series circuits; 
 a plurality of second switching element each having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in one of the series circuits; and 
 a switching control circuit for turning the first switching elements off when the high-side field-effect transistors are turned on, turning the first switching elements on when the high-side field-effect transistors are turned off, turning the second switching elements off when the low-side field-effect transistors are turned on, and turning the second switching elements on when the low-side field-effect transistors are turned off. 
 
     
     
       14. A semiconductor device comprising:
 an output terminal; 
 a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off: 
 a driver circuit for outputting a plurality of first driving signals to the control terminals of the high-side field-effect transistors and a plurality of second driving signals to the control terminals of the low-side field-effect transistors; wherein 
 the first driving signals turn the high-side field-effect transistors on at mutually differing timings: and 
 the second driving signals turn the low-side field-effect transistors on at mutually differing timings, 
 wherein the high-side field-effect transistors and the low-side field-effect transistors are N-MOSFETs, further comprising: 
 a plurality of first switching elements each having one terminal connected to the output terminal and another terminal connected to the control terminal of the high-side field-effect transistor in one of the series circuits; 
 a plurality of second switching element each having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in one of the series circuits; and 
 a switching control circuit for turning the first switching elements off when the high-side field-effect transistors are turned on, turning the first switching elements on when the high-side field-effect transistors are turned off, turning the second switching elements off when the low-side field-effect transistors are turned on, and turning the second switching elements on when the low-side field-effect transistors are turned off.