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US8134206B2ActiveUtilityPatentIndex 39

Semiconductor device

Assignee: CHEN XINGBIPriority: Jan 8, 2009Filed: Jan 8, 2010Granted: Mar 13, 2012
Est. expiryJan 8, 2029(~2.5 yrs left)· nominal 20-yr term from priority
Inventors:CHEN XINGBI
H10D 84/83H10D 84/0151H10D 84/038H10D 84/013
39
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Claims

Abstract

This invention provides a semiconductor device, which is used to manufacture two lateral high-voltage devices on the same substrate, where the voltages between maximum voltage terminals and minimum voltage terminals of the two devices have not too much difference. Both devices are formed on two different surface regions with a small isolation region in-between the two regions. When the semiconductor region(s) of the isolation region is fully depleted, its effective electric flux density emitted to the substrate is of a value between the values of its adjacent regions of said two semiconductor devices. The figure presented here schematically shows the structure used to form a low-side high-voltage n-MOST and high-voltage n-MOST and M 1 , where their terminal voltages are very close.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A semiconductor device comprising at least a surface isolation region between two surface high-voltage devices implemented on the surface of a lightly doped substrate of a first conductivity type, the potential of a neutral region of said substrate under an externally applied reverse biasing voltage being taken as reference, each of said surface devices consisting of at least a surface region of semiconductor of a second conductivity type having the largest voltage and another surface region of semiconductor of the first conductivity type having the smallest voltage, wherein a surface region between said region having the largest voltage and said region having the smallest voltage is a surface voltage-sustaining region, where the bottom of said voltage-sustaining region is a semiconductor region of said second conductivity type;
 each said surface voltage-sustaining region of both surface high-voltage devices is fully depleted under a maximum reverse voltage applied to said largest voltage region and smallest voltage region and said surface high-voltage device then emits an effective electric flux density of second conductivity type to said substrate; 
 said surface voltage-sustaining region has a thickness, said thickness being smaller than the depletion thickness of a one-sided abrupt parallel plane junction made by said substrate under its breakdown voltage; 
 wherein the potential difference between both largest voltage regions of said two devices and the potential difference between both smallest voltage regions of said two devices are much smaller than said maximum reverse voltages applied to said largest voltage region and smallest voltage region of both devices; 
 said two surface high-voltage devices are implemented separately in two surface areas, and a surface isolation region is between said two areas, wherein the directions from said largest voltage region to smallest voltage region of both devices and of said surface isolation region are identical; 
 said isolation region has two widths perpendicular to each other and perpendicular to said direction, said widths being smaller than the depletion width of a one-sided abrupt parallel plane junction made by said substrate under its breakdown voltage; 
 said isolation region has at least two semiconductor layers of second conductivity type, one being contacted to one of said surface devices and another being contacted to another of said surface devices, wherein when the semiconductor region(s) of the isolation region is fully depleted, its effective flux density of second conductivity type emitted to the substrate is of a value between the values of its adjacent surface voltage-sustaining regions of said two surface semiconductor devices; said effective electric flux density of said second conductivity type is produced by the amount of ionized impurities in a surface area divided by the area; 
 said largest voltage is positive when said first conductivity type is a p-type, or negative when said first conductivity type is n-type. 
 
     
     
       2. A semiconductor device according to  claim 1 , wherein when said largest voltage is applied across said largest voltage region and said smallest voltage region, said effective flux density of second conductivity type emitted to said substrate decreases gradually towards said smallest voltage region according to the increasing of the distance from said largest voltage region. 
     
     
       3. A surface isolation region according to  claim 1 , wherein an insulator region is inside said isolation region. 
     
     
       4. A semiconductor device according to  claim 1 , wherein an insulator layer is set in-between said substrate and said high-voltage surface devices as well as said surface isolation region. 
     
     
       5. A semiconductor device according to  claim 1 , wherein said voltage-sustaining regions consist of semiconductor layers with different conductivity types.

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