Nonvolatile semiconductor memory device and method of manufacturing the same

Abstract

A nonvolatile semiconductor memory device includes: a first semiconductor region having first conductivity; a channel formation region in which a channel inversion layer having second conductivity is formed; a second semiconductor region having the second conductivity; a third semiconductor region having the second conductivity; a laminated insulating film formed on the channel formation region; and a control electrode formed on the laminated insulating film. The laminated insulating film includes a first insulating film, a charge storage film, and a second insulating film in order from the channel formation region side. The control electrode extends to above one of the second semiconductor region and the third semiconductor region. The charge storage film present between an extended portion of the control electrode and the second semiconductor region or the third semiconductor region is removed and a portion where the charge storage film is removed is filled with a third insulating film.

1. A nonvolatile semiconductor memory device comprising:
 a semiconductor body with a first semiconductor region having first conductivity; 
 a channel formation region that is a surface portion of the first semiconductor region having a second conductivity; 
 a second semiconductor region that is adjacent the channel formation region and has the second conductivity; 
 a third semiconductor region that is spaced apart from the second semiconductor region and adjacent the channel formation region at a side opposite the second semiconductor region and has the second conductivity; 
 a laminated insulating film structure formed over the channel formation region; and 
 a control electrode formed above the laminated insulating film, wherein 
 the laminated insulating film includes a first insulating film, a charge storage film having a charge storage ability, and a second insulating film in order from the channel formation region side, 
 the control electrode extends to a location that is perpendicularly above at least one of the second semiconductor region and the third semiconductor region, and 
 the charge storage film being adjacent a third insulating film having a charge storage ability lower than that of the charge storage film, and wherein the charge storage film is surrounded by insulating material that is located perpendicularly below the control electrode, and further wherein the second and third semiconductor regions each extend to locations that are perpendicularly beneath the insulation at corresponding sides of the charge storage film, and further wherein substantially none of the charge storage film extends directly above the second and third semiconductor regions, the charge storage film being centrally located above and between the second and third semiconductor regions and extending proximate boundaries for the second and third semiconductor regions. 
 
     
     
       2. A nonvolatile semiconductor memory device according to  claim 1 , further comprising:
 a memory cell array in which memory cells including the first to the third semiconductor regions, the laminated insulating film, and the control electrode are integrated; and 
 a peripheral circuit, wherein 
 in an operation object memory cell selected in the memory cell array, the peripheral circuit is capable of executing a first charge injecting operation for biasing a region between the second semiconductor region and the first semiconductor region, biasing the control electrode to form an inversion layer channel in the channel formation region, and injecting first polarity charges into a local portion of the charge storage film on a side where the third insulating film is formed and a second charge injecting operation for, in reducing an amount of retained charges of the first polarity charges, biasing the second semiconductor region or the third semiconductor region on a side where the third insulating film is formed and the control electrode, causing band-to-band tunneling on a surface portion of the second semiconductor region or the third semiconductor region with which the third insulating film is in contact, and injecting second polarity charges caused by the band-to-band tunneling into the local portion of the charge storage film that retains the first polarity charges. 
 
     
     
       3. A method of manufacturing a nonvolatile semiconductor memory including: a first semiconductor region having first conductivity; a channel formation region that is a surface portion of the first semiconductor region and in which a channel having a second conductivity is formed; a second semiconductor region that is adjacent the channel formation region and has the second conductivity; a third semiconductor region that is spaced apart from the second semiconductor region and adjacent the channel formation region at a side opposite the second semiconductor region and which has the second conductivity; a laminated insulating film formed over the channel formation region; and a control electrode formed above the laminated insulating film, the laminated insulating film including a first insulating film, a charge storage film having a charge storage ability, and a second insulating film in order from the channel formation region side, the method of manufacturing a nonvolatile semiconductor memory device comprising:
 depositing respective insulating materials of the first insulating film, the charge storage film, and the second insulating film and a conductive material of the control electrode above the first semiconductor region in this order; 
 forming at least one of the conductive material and the respective insulating materials as a pattern of the control electrode and exposing sides of the charge storage film; and 
 etching the exposed sides of the charge storage film thereby retracting the charge storage film by a predetermined width closer to a center; 
 filling a space at sides of the etched charge storage film with a third insulating film; and 
 forming the second semiconductor region and the third semiconductor region, and wherein the charge storage film is surrounded by insulating material that is located perpendicularly below the control electrode, and further wherein the second and third semiconductor regions each extend to locations that are perpendicularly beneath the insulation at corresponding sides of the charge storage film, and further wherein substantially none of the charge storage film extends directly above the second and third semiconductor regions, the charge storage film being centrally located above and between the second and third semiconductor regions and extending proximate boundaries for the second and third semiconductor regions.