Semiconductor device, production method thereof, and electronic device

Abstract

The present invention provides a semiconductor device which includes a thin film transistor as a resistance element, wherein a variation in resistance of the thin film transistor is suppressed without increasing an area of the resistance element and the resistance element can be produced through simplified production steps. The semiconductor device of the present invention is a semiconductor device including a first thin film transistor and a second thin film transistor on a substrate, the first thin film transistor being used as a resistance element, the second thin film transistor including a semiconductor layer having a low concentration drain region and a high concentration drain region, the low concentration drain region and the high concentration drain region being different in impurity concentration, wherein an impurity concentration of a channel region of a semiconductor layer in the first thin film transistor is the same as an impurity concentration of the low concentration drain region of the semiconductor layer in the second thin film transistor.

1. A semiconductor device, comprising:
 a first thin film transistor and a second thin film transistor on a substrate, 
 wherein the first thin film transistor is used as a resistance element and includes a first semiconductor layer having a channel region, 
 wherein the second thin film transistor includes a second semiconductor layer having a low concentration drain region and a high concentration drain region, the low concentration drain region and the high concentration drain region being different in impurity concentration, and 
 wherein an impurity concentration of the channel region of the first semiconductor layer in the first thin film transistor is the same as an impurity concentration of the low concentration drain region of the second semiconductor layer in the second thin film transistor. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein a resistance in the channel region of the first semiconductor layer in the first thin film transistor varies depending on a voltage applied to a gate electrode. 
     
     
       3. The semiconductor device according to  claim 2 , wherein the first thin film transistor is an N-type transistor. 
     
     
       4. The semiconductor device according to  claim 2 , wherein the first thin film transistor is a P-type transistor. 
     
     
       5. An electronic device comprising the semiconductor device of  claim 1 . 
     
     
       6. The semiconductor device according to  claim 1 , wherein a net impurity concentration of the channel region of the first semiconductor layer in the first thin film transistor is one of N- or P-type and a net impurity concentration of the low concentration drain region of the second semiconductor layer in the second thin film transistor is the same type. 
     
     
       7. The semiconductor device according to  claim 1 , wherein a gate electrode of the second thin film transistor completely overlaps the low concentration drain region of the second semiconductor layer of the second thin film transistor. 
     
     
       8. The semiconductor device according to  claim 1 , wherein a gate electrode of the first thin film transistor is aligned so as to substantially completely overlap the channel region of the first semiconductor layer of the first thin film transistor. 
     
     
       9. The semiconductor device according to  claim 1 ,
 wherein the first semiconductor layer further includes high impurity concentration source and drain regions on both sides of the channel region of the first semiconductor layer, 
 wherein the first thin film transistor further comprises source and drain wirings connected respectively to the source and drain regions of the first semiconductor layer, 
 wherein the second semiconductor layer further includes a high impurity concentration source region and a low impurity concentration source region, 
 wherein the second thin film transistor further comprises source and drain wirings connected respectively to the high impurity concentration source and drain regions of the second semiconductor layer, 
 wherein the source and drain wirings of the first semiconductor layer are separate from the source and drain wirings of the second semiconductor layer. 
 
     
     
       10. The semiconductor device according to  claim 1 , wherein an impurity concentration of the channel region of the first thin film transistor and an impurity concentrations of the low concentration drain region of the second thin film transistor both range substantially between 10 17  and 10 18  ion/cm 3 .