Printed circuit board

Abstract

A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

1. A printed circuit board, comprising:
 a first layout layer comprising a first signal line and second signal line, each comprising a curved first portion; 
 a second layout layer comprising a third signal line and a fourth signal line, each comprising a curved first portion, the first layout layer being disposed above the second layout layer; 
 at least a third layout layer disposed below the second layout layer; and 
 a first via and a second via through the first layout layer, the second layout layer and the third layout layer, the curved first portions of the first signal line and the third signal line being coupled to the first via, the curved first portions of the second signal line and the fourth signal line being coupled to the second via; 
 wherein the curved first portions of the first signal line and the third signal line are disposed around the first via to cooperatively generate a spiral inductance characteristic with respect to a portion of the third layout layer around the first via, the portion of the third layout layer around the first via includes a first via stub portion, the spiral inductance characteristic generated by the curved first portions of the first signal line and the third signal line substantially compensates the capacitance characteristic of the first via stub portion; and 
 wherein the curved first portions of the second signal line and the fourth signal line are disposed around the second via to cooperatively generate a spiral inductance characteristic with respect to a portion of the third layout layer around the second via, the portion of the third layout layer around the second via includes a second via stub portion, the spiral inductance characteristic generated by the curved first portions of the second signal line and the fourth signal line substantially compensates the capacitance characteristic of the second via stub portion. 
 
     
     
       2. The printed circuit board as claimed in  claim 1 , wherein the curved first portions of the first signal line, the second signal line, the third signal line, and the fourth signal line are J-shaped, C-shaped, or other curved shape. 
     
     
       3. The printed circuit board as claimed in  claim 1 , wherein the first signal line and the second signal line each comprise a straight second portion connecting the curved first portions of the first signal line and the second signal line, respectively, the third signal line and the fourth signal line each comprise a straight second portion connecting the curved first portions of the third signal line and the fourth signal line, respectively, the first signal line and the second signal line disposed symmetrically on the first layout layer, the third signal line and the fourth signal line are disposed symmetrically on the second layout layer. 
     
     
       4. The printed circuit board as claimed in  claim 3 , wherein the widths of the curved first portions of the first signal line and the second signal line exceed those of the straight second portions, the widths of the curved first portions of the third signal line and the fourth signal line exceed those of the straight second portions. 
     
     
       5. The printed circuit board as claimed in  claim 1 , wherein the first signal line, the second signal line, the third signal line and the fourth signal line transmit a pair of transmitting signals. 
     
     
       6. The printed circuit board as claimed in  claim 5 , wherein the transmitting signals are a pair of serial signals or a pair of differential signals. 
     
     
       7. The printed circuit board as claimed in  claim 1 , wherein an isolation layer is disposed between the first layout layer and the second layout layer, and the first via and the second via are through the isolation layer. 
     
     
       8. The printed circuit board as claimed in  claim 1 , wherein two first conducting portions of the first layout layer are coupled to and disposed around the first via and the second via, respectively, and the curved first portions of the first signal line and the second signal line are disposed around the first via and the second via by the first conducting portions, and two second conducting portions of the second layout layer are coupled to and disposed around the first via and the second via, and the curved first portions of the third signal line and the fourth signal line are disposed around the first via and the second via by the second conducting portions. 
     
     
       9. The printed circuit board as claimed in  claim 1 , further comprising a copper foil layer including a through hole disposed between the first layout layer and the second layout layer, the first via and the second via passing through the through hole, wherein projections of the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line on the copper foil layer are within an area of the through hole. 
     
     
       10. The printed circuit board as claimed in  claim 1 , wherein the spiral inductance characteristic generated by the curved first portions of the first signal line and the third signal line is between the first layout layer and the second layout layer, the spiral inductance characteristic generated by the curved first portions of the second signal line and the fourth signal line is between the first layout layer and the second layout layer. 
     
     
       11. The printed circuit board as claimed in  claim 1 , wherein the spiral inductance characteristic generated by the curved first portions of the first signal line and the third signal line cancels out the capacitance characteristic of the first via stub portion, the spiral inductance characteristic generated by the curved first portions of the second signal line and the fourth signal line cancels out the capacitance characteristic of the second via stub portion. 
     
     
       12. A printed circuit board, comprising:
 a first layout layer comprising a first signal line and a second signal line; 
 a second layout layer comprising a third signal line and a fourth signal line, the first layout layer being disposed above the second layout layer; 
 at least a third layout layer disposed below the second layout layer; and 
 a first via and a second via through the first layout layer, the second layout layer and the third layout layer; 
 wherein the first signal line and the third signal line are disposed around and spirally coupled to the first via for cooperatively generating a spiral inductance characteristic with respect to a portion of the third layout layer around the first via, the portion of the third layout layer around the first via includes a first via stub portion, the spiral inductance characteristic generated by the first signal line and the third signal line substantially compensates the capacitance characteristic of the first via stub portion; and 
 wherein the second signal line and the fourth signal line are disposed around and spirally coupled to the second via for cooperatively generating a spiral inductance characteristic with respect to a portion of the third layout layer around the second via, the portion of the third layout layer around the second via includes a second via stub portion, the spiral inductance characteristic generated by the second signal line and the fourth signal line substantially compensates the capacitance characteristic of the second via stub portion. 
 
     
     
       13. The printed circuit board as claimed in  claim 12 , wherein the first signal line, the second signal line, the third signal line and the fourth signal line each comprise a curved first portion and a straight second portion connected with each other, respectively, and the first signal line and the second signal line are disposed symmetrically on the first layout layer, and the third signal line and the fourth signal line are disposed symmetrically on the second layout layer. 
     
     
       14. The printed circuit board as claimed in  claim 13 , wherein the curved first portions of the first signal line and the third signal line are disposed around and coupled to the first via to form a spiral, and the curved first portion of the second signal line and the fourth signal line are disposed around and coupled to the second via to form a spiral. 
     
     
       15. The printed circuit board as claimed in  claim 13 , wherein an isolation layer is disposed between the first layout layer and the second layout layer, and the first via and the second via are through the isolation layer. 
     
     
       16. The printed circuit board as claimed in  claim 13 , wherein the shapes of the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are J-shaped, C-shaped, or other curved shape. 
     
     
       17. The printed circuit board as claimed in  claim 13 , wherein the widths of the curved first portions of the first signal line and the second signal line exceed those of the straight second portions, and the widths of the curved first portions of the third signal line and the fourth signal line exceed those of the straight second portions. 
     
     
       18. The printed circuit board as claimed in  claim 13 , further comprising a copper foil layer including a through hole disposed between the first layout layer and the second layout layer, the first via and the second via passing through the through hole, wherein projections of the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line on the copper foil layer are within an area of the through hole. 
     
     
       19. The printed circuit board as claimed in  claim 12 , wherein the spiral inductance characteristic generated by the first signal line and the third signal line is between the first layout layer and the second layout layer, the spiral inductance characteristic generated by the second signal line and the fourth signal line is between the first layout layer and the second layout layer. 
     
     
       20. The printed circuit board as claimed in  claim 12 , wherein the spiral inductance characteristic generated by the first signal line and the third signal line cancels out the capacitance characteristic of the first via stub portion, the spiral inductance characteristic generated by the second signal line and the fourth signal line cancels out the capacitance characteristic of the second via stub portion.