Analog-to-digital converter

Abstract

A sequential comparison-type analog-to-digital converter (ADC) that has improved precision and which is capable of high-speed operation is disclosed, the analog-to-digital converter comprising a digital-to-analog converter that outputs a plurality of different reference analog signals according to a multibit digital signal, a plurality of comparators that compare an input analog signal with the plurality of reference analog signals, and a sequential comparison control circuit that changes bit values of the multibit digital signal in order from higher bits so that at least one of the plurality of reference analog signals becomes closer to the input analog signal and decides the bit values in order from higher bits based on the comparison results and at the same time, correcting the decided higher bit values, wherein the sequential comparison control circuit decides the bit values of the multibit digital signal down to a predetermined bit based on the comparison results of the plurality of comparators and at the same time, correcting the bit values, and decides the bits lower than the predetermined bit based on the comparison result of one of the plurality of comparators.

1. An analog-to-digital converter comprising:
 a digital-to-analog converter that outputs a plurality of different reference analog signals according to a multibit digital signal; 
 a plurality of comparators that compare an input analog signal with the plurality of reference analog signals; and 
 a sequential comparison control circuit that changes bit values of the multibit digital signal in order from higher bits so that at least one of the plurality of reference analog signals becomes closer to the input analog signal and decides the bit values of the multibit digital signal in order from higher bits based on the comparison results of the plurality of comparators according to the plurality of changed reference analog signals and at the same time, correcting the decided bit values, wherein 
 the sequential comparison control circuit decides the bit values of the multibit digital signal down to a predetermined bit based on the comparison results of the plurality of comparators and at the same time, correcting the bit values, and decides the bits lower than the predetermined bit based on the comparison result of one of the plurality of comparators. 
 
     
     
       2. The analog-to-digital converter according to  claim 1 , wherein
 k>n−m holds where the number of bits of the analog-to-digital converter is n, the number of bits down to the predetermined bit to be decided based on the comparison results of the plurality of comparators is m, and the number of steps for deciding the bit values based on the comparison result of one of the plurality of comparators is k. 
 
     
     
       3. The analog-to-digital converter according to  claim 1 , wherein
 the sequential comparison control circuit changes the bit values of the multibit digital signal according to the non-binary conversion algorithm when deciding the bits lower than the predetermined bit. 
 
     
     
       4. The analog-to digital converter according to  claim 2 , wherein
 the sequential comparison control circuit changes the bit values of the multibit digital signal according to the non-binary conversion algorithm when deciding the bits lower than the predetermined bit.