Receiver with improved flicker noise performance

Abstract

A method for demodulating an RF input signal using an envelope detector and synchronous switching of the input signal before entering and after leaving the envelope detector, the envelope detector having a non-linear transfer function acting essentially as a squaring function. The invention also relates to an electronic receiver circuit performing such a method, and to an RF receiver comprising such an electronic receiver, and to an electronic device comprising such an RF receiver, and to the use of such an RF receiver as a wake-up receiver.

1. Method for demodulating a radio frequency (RF) input signal to a demodulated output signal comprising:
 receiving the RF input signal; 
 providing a first clock signal having a first reference period and a first signaling period and a first clock frequency, and applying the first clock signal to a first switching block; 
 switching in the first switching block to the RF input signal during the first signaling period and to a reference signal during the first reference period, thereby creating a first signal; 
 demodulating the first signal by an RF front end comprising an envelope detector, the RF front end having a non-linear transfer-characteristic, thereby creating a second signal; 
 providing a second clock signal having a second reference period and a second signaling period and a second clock frequency equal to the first clock frequency, and applying the second clock signal to a second switching and compensation block; 
 sampling the second signal in the second switching and compensation block so as to store a first sample of the second signal during the second signaling period and to store a second sample of the second signal during the second reference period; and 
 compensating the first sample by the second sample to obtain the demodulated output signal. 
 
     
     
       2. The method according to  claim 1 , wherein the RF input signal comprises an on-off modulated RF carrier. 
     
     
       3. The method according to  claim 1 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 10%-40%. 
     
     
       4. The method according to  claim 1 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 20%-30%. 
     
     
       5. The method according to  claim 1 , wherein the first clock signal has duty cycle of 50%, and the second clock signal has a duty cycle essentially equal to 25%. 
     
     
       6. The method according to  claim 1 , wherein the storage and compensation of the first and second samples of the second signal is achieved by connecting the second signal to a capacitor directly during the second signaling period, and inversely during the second reference period. 
     
     
       7. The method according to  claim 1 , wherein the storage of the first sample of the second signal is achieved by connecting the second signal to a first capacitor during the second signaling period, and the storage of the second sample of the second signal is achieved by connecting the second signal to a second capacitor during the second reference period, and the compensation is achieved by subtracting the charge stored on the second capacitor from the charge stored on the first capacitor. 
     
     
       8. The method according to  claim 7 ,
 wherein the subtracting is performed by a differential amplifier, and 
 wherein the first capacitor is connected to a non-inverting input of the differential amplifier, and the second capacitor is connected to an inverting input of the differential amplifier. 
 
     
     
       9. The method according to  claim 1 , wherein the reference signal is ground. 
     
     
       10. The method according to  claim 1 , wherein the RF input signal is filtered by an RF band-pass filter before being applied to the first switching block. 
     
     
       11. The method according to  claim 1 , wherein the second signal is amplified by a baseband amplifier before being sampled in the second switching and compensation block. 
     
     
       12. The method according to  claim 1 ,
 wherein the second signal is filtered, by a second band-pass filter to retain only one side lobe, before being sampled in the second switching and compensation block, and 
 wherein the only one side lobe comprises a side lobe located at the first clock frequency. 
 
     
     
       13. The method according to  claim 1 , wherein the first clock frequency is higher than a corner frequency of the 1/f noise and a thermal noise intercept point of the RF front end. 
     
     
       14. An electronic radio frequency (RF) receiver circuit for demodulating an RF input signal, having a frequency spectrum with a lobe located at a carrier frequency, to a demodulated output signal, wherein the RF receiver circuit comprises:
 a first clock circuit for providing a first clock signal having a first reference period and a first signaling period and a first clock frequency; 
 a first switching block for switching under control of the first clock signal to the RF input signal during the first signaling period and to a reference signal during the first reference period, thereby creating a first signal; 
 an RF front end for demodulating the first signal, the RF front end comprising an envelope detector and having a non-linear transfer-characteristic, thereby creating a second signal; 
 a second clock circuit for providing a second clock signal having a second reference period and a second signaling period and a second clock frequency equal to the first clock frequency; and 
 a second switching and compensation block for switching the second signal under control of the second clock signal so as to store a first sample of the second signal during the second signaling period and to store a second sample of the second signal during the second reference period, and to compensate the first sample by the second sample to obtain the demodulated output signal. 
 
     
     
       15. The electronic RF receiver circuit according to  claim 14 , wherein the RF input signal comprises an on-off modulated RF carrier. 
     
     
       16. The electronic RF receiver circuit according to  claim 15 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 10%-40%. 
     
     
       17. The electronic RF receiver circuit according to  claim 15 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 20%-30%. 
     
     
       18. The electronic RF receiver circuit according to  claim 15 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle that is essentially equal to 25%. 
     
     
       19. The electronic RF receiver circuit according to  claim 14 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 10%-40%. 
     
     
       20. The electronic RF receiver circuit according to  claim 14 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle in the range of 20%-30%. 
     
     
       21. The electronic RF receiver circuit according to  claim 14 , wherein the first clock signal has a duty cycle of 50%, and the second clock signal has a duty cycle essentially equal to 25%. 
     
     
       22. The electronic RF receiver circuit according to  claim 14  further comprising a capacitor,
 wherein the storage and compensation of the first and second sample of the second signal is achieved by connecting the second signal to the capacitor directly during the second signaling period, and inversely during the second reference period. 
 
     
     
       23. The electronic RF receiver circuit according to  claim 14  further comprising a first capacitor and a second capacitor,
 wherein the storage of the first sample of the second signal is achieved by connecting the second signal to the first capacitor during the second signaling period, and the storage of the second sample of the second signal is achieved by connecting the second signal to the second capacitor during the second reference period, and the compensation is achieved by subtracting the charge stored on the second capacitor from the charge stored on the first capacitor. 
 
     
     
       24. The electronic RF receiver circuit according to  claim 23 ,
 wherein the subtracting is performed by a differential amplifier, and 
 wherein the first capacitor is connected to a non-inverting input of the differential amplifier, and the second capacitor is connected to an inverting input of the differential amplifier. 
 
     
     
       25. The electronic RF receiver circuit according to  claim 14 , wherein the reference signal is ground. 
     
     
       26. The electronic RF receiver circuit according to  claim 14 , further comprising:
 an RF band-pass filter for filtering the RF input signal before entering the first switching block. 
 
     
     
       27. The electronic RF receiver circuit according to  claim 14  further comprising:
 a baseband amplifier located between the envelope detector and the second switching and compensation block, wherein the baseband amplifier amplifies the second signal. 
 
     
     
       28. The electronic RF receiver circuit according to  claim 14  further comprising:
 a second band-pass filter located between the envelope detector and the second switching and compensation block, wherein the second band-pass filter filters the second signal to retain only one side lobe before entering the second switching and compensation block, and 
 wherein the only one side lobe comprises a side lobe located at the first clock frequency. 
 
     
     
       29. The electronic RF receiver circuit according to  claim 14 , wherein the first clock frequency is higher than a corner frequency of the 1/f noise and a thermal noise intercept point of the RF front end. 
     
     
       30. An RF receiver comprising an electronic RF receiver circuit according to  claim 14 . 
     
     
       31. An electronic device comprising an RF receiver according to  claim 30 . 
     
     
       32. A method comprising:
 using the RF receiver according to  claim 31  as a wake-up receiver.