Method for manufacturing transistor

Abstract

To provide a method for manufacturing a transistor which has little variation in characteristics and favorable electric characteristics. A gate insulating film is formed over a gate electrode; a semiconductor layer including a microcrystalline semiconductor is formed over the gate insulating film; an impurity semiconductor layer is formed over the semiconductor layer; a mask is formed over the impurity semiconductor layer, and then the semiconductor layer and the impurity semiconductor layer are etched with use of the mask to form a semiconductor stacked body; the mask is removed and then the semiconductor stacked body is exposed to plasma generated in an atmosphere containing a rare gas to form a barrier region on a side surface of the semiconductor stacked body; and a wiring over the impurity semiconductor layer of the semiconductor stacked body is formed.

1. A method for manufacturing a transistor comprising the steps of:
 forming a gate electrode; 
 forming a gate insulating layer over the gate electrode; 
 forming a semiconductor layer over the gate insulating layer; 
 forming an impurity semiconductor layer over the semiconductor layer; 
 forming a mask over the impurity semiconductor layer, and then etching the semiconductor layer and the impurity semiconductor layer with use of the mask to form a semiconductor stacked body; 
 removing the mask and then exposing the semiconductor stacked body to plasma generated in an atmosphere containing a rare gas; 
 forming a conductive layer over the semiconductor stacked body after exposing the semiconductor stacked body to the plasma; and 
 etching part of the conductive layer, the impurity semiconductor layer and the semiconductor layer in the semiconductor stacked body to form a first wiring layer, a second wiring layer, a source region, and a drain region. 
 
     
     
       2. The method for manufacturing a transistor according to  claim 1 , wherein the atmosphere containing the rare gas further comprises phosphorus or boron. 
     
     
       3. The method for manufacturing a transistor according to  claim 1 , wherein a back gate electrode is provided so as to overlap with a channel formation region of the semiconductor layer with an insulating layer interposed between. 
     
     
       4. The method for manufacturing a transistor according to  claim 1 , wherein the semiconductor layer includes a microcrystalline semiconductor layer and an amorphous semiconductor layer which is formed over the microcrystalline semiconductor layer. 
     
     
       5. The method for manufacturing a transistor according to  claim 1 , wherein the semiconductor layer and the impurity semiconductor layer are etched so that an end portion of the semiconductor stacked body is located outside an end portion of the gate electrode in a planar structure. 
     
     
       6. The method for manufacturing a transistor according to  claim 1 , wherein the semiconductor layer and the impurity semiconductor layer are etched so that an end portion of the semiconductor stacked body is located inside an end portion of the gate electrode in a planar structure. 
     
     
       7. A method for manufacturing a transistor comprising the steps of:
 forming a gate electrode; 
 forming a gate insulating layer over the gate electrode; 
 forming a semiconductor layer over the gate insulating layer; 
 forming an impurity semiconductor layer over the semiconductor layer; 
 forming a mask over the impurity semiconductor layer, and then etching the semiconductor layer and the impurity semiconductor layer with use of the mask to form a semiconductor stacked body; 
 exposing the semiconductor stacked body to plasma generated in an oxygen gas atmosphere; 
 removing the mask and then exposing the semiconductor stacked body to plasma generated in an atmosphere containing a rare gas; 
 forming a conductive layer over the semiconductor stacked body after exposing the semiconductor stacked body to the plasma generated in an atmosphere containing the rare gas; 
 etching part of the conductive layer, the impurity semiconductor layer and the semiconductor layer in the semiconductor stacked body to form a first wiring layer, a second wiring layer, a source region, and a drain region. 
 
     
     
       8. The method for manufacturing a transistor according to  claim 7 , wherein the atmosphere containing the rare gas further comprises phosphorus or boron. 
     
     
       9. The method for manufacturing a transistor according to  claim 7 , wherein a back gate electrode is provided so as to overlap with a channel formation region of the semiconductor layer with an insulating layer interposed between. 
     
     
       10. The method for manufacturing a transistor according to  claim 7 , wherein the semiconductor layer includes a microcrystalline semiconductor layer and an amorphous semiconductor layer which is formed over the microcrystalline semiconductor layer. 
     
     
       11. The method for manufacturing a transistor according to  claim 7 , wherein the semiconductor layer and the impurity semiconductor layer are etched so that an end portion of the semiconductor stacked body is located outside an end portion of the gate electrode in a planar structure. 
     
     
       12. The method for manufacturing a transistor according to  claim 7 , wherein the semiconductor layer and the impurity semiconductor layer are etched so that an end portion of the semiconductor stacked body is located inside an end portion of the gate electrode in a planar structure.