US8389314B2ActiveUtilityA1

MEMS device with roughened surface and method of producing the same

58
Assignee: MARTIN JOHN RPriority: Oct 3, 2006Filed: Oct 3, 2006Granted: Mar 5, 2013
Est. expiryOct 3, 2026(~0.2 yrs left)· nominal 20-yr term from priority
B81B 3/001B81C 2201/115B81B 2201/0257
58
PatentIndex Score
2
Cited by
10
References
12
Claims

Abstract

A method of producing a MEMS device provides a MEMS apparatus having released structure. The MEMS apparatus is formed at least in part from an SOI wafer having a first layer, a second layer spaced from the first layer, and an insulator layer between the first layer and second layer. The first layer has a top surface, while the second layer has a bottom surface facing the top surface. After providing the MEMS apparatus, the method increases the roughness of at least the top surface of the first layer or the bottom surface of the second layer.

Claims

exact text as granted — not AI-modified
1. A method of producing a MEMS device, the method comprising:
 providing a MEMS apparatus having released structure, the MEMS apparatus being formed at least in part from an SOI wafer having a first layer, a second layer spaced from the first layer, and an insulator layer between the first layer and second layer, the first layer having a top surface, the second layer having a bottom surface facing the top surface of the first layer; and 
 after providing the MEMS apparatus, increasing the roughness of at least the top surface of the first layer or the bottom surface of the second layer, the method increasing the roughness by applying a dry etch or a wet etch to at least one of the top surface of the first layer or the bottom surface of the second layer. 
 
     
     
       2. The method as defined by  claim 1  wherein increasing the roughness comprises increasing the roughness of both the top surface of the first layer and the bottom surface of the second layer. 
     
     
       3. The method as defined by  claim 1  wherein the second layer of the MEMS apparatus comprises movable structure, the insulator layer being patterned to suspend the movable structure. 
     
     
       4. The method as defined by  claim 1  wherein the first layer and second layer each are formed from single crystal silicon. 
     
     
       5. The method as defined by  claim 1  wherein increasing the roughness comprises increasing the roughness of at least the top surface of the first layer or the bottom surface of the second layer to a value of greater than or equal to about 1.0 nm RMS. 
     
     
       6. The method as defined by  claim 1  wherein providing comprises:
 etching the second layer to form unreleased structure; and 
 removing at least a portion of the insulator layer to release the structure. 
 
     
     
       7. The method as defined by  claim 1  wherein the top surface and bottom surface each have exposed areas that are not in contact with the insulator layer, increasing the roughness comprising increasing the roughness of at least a portion of the exposed area of the top surface of the first layer or a portion of the exposed area of the bottom surface of the second layer. 
     
     
       8. The method as defined by  claim 1  wherein the MEMS device is an inertial sensor or a microphone. 
     
     
       9. A MEMS device comprising:
 an SOI wafer having a first wafer with a top surface, a second wafer, and an insulator layer between the first wafer and the second wafer; and 
 structure formed by the second wafer and having a bottom surface, the structure being spaced from the first wafer, 
 at least a portion of either one of the top surface or the bottom surface having a minimum roughness of at least 1.0 nm RMS. 
 
     
     
       10. The MEMS device as defined by  claim 9  wherein both the top surface and the bottom surface have a roughness that is equal to or greater than about 1.0 nm RMS. 
     
     
       11. The MEMS device as defined by  claim 9  wherein the first wafer and second wafer each comprise silicon. 
     
     
       12. The MEMS device as defined by  claim 9  wherein the structure has a structure surface that comprises a part of the bottom surface of the second wafer, the structure surface having a roughness that is equal to or greater than about 1.0 nm RMS.

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