System providing a switched output signal and a high resolution output signal

Abstract

A system includes a sensing system, a first chopped circuit, a second chopped circuit, and a multiplexer. The sensing system is configured to provide input signals. The first chopped circuit is configured to switch in response to the input signals crossing a first limit and to provide a first output signal that is valid during some chopping phases. The second chopped circuit is configured to switch in response to the input signals crossing a second limit and to provide a second output signal that is valid during other chopping phases. The multiplexer is configured to switch between the first output signal and the second output signal to provide a valid output signal during all chopping phases.

What is claimed is: 
     
       1. A system comprising:
 a sensing system configured to provide input signals; 
 a first chopped circuit configured to switch in response to the input signals crossing a first limit and to provide a first output signal that is valid during some chopping phases; 
 a second chopped circuit configured to switch in response to the input signals crossing a second limit and to provide a second output signal that is valid during other chopping phases; and 
 a multiplexer configured to switch between the first output signal and the second output signal to provide a valid output signal during all chopping phases. 
 
     
     
       2. The system of  claim 1 , wherein the first chopped circuit is a first chopped auto-zeroing comparator and the second chopped circuit is a second chopped auto-zeroing comparator. 
     
     
       3. The system of  claim 1 , comprising:
 a clock generator configured to clock the first chopped circuit and the second chopped circuit at the same frequency. 
 
     
     
       4. The system of  claim 1 , comprising:
 a programmable digital to analog converter configured to provide the first limit, wherein the first limit is one of a constant limit and a slope limit. 
 
     
     
       5. The system of  claim 1 , comprising:
 a third circuit configured to provide a high resolution output signal that corresponds to the sensed input signals and has a higher resolution than the valid output signal. 
 
     
     
       6. The system of  claim 5 , wherein the multiplexer provides the valid output signal faster than the third circuit provides the high resolution output signal. 
     
     
       7. The system of  claim 5 , wherein the third circuit includes one of a chopped sigma delta analog to digital converter, a chopped analog comparator, a chopped auto-zeroed analog comparator, and a chopped analog amplifier. 
     
     
       8. The system of  claim 5 , comprising:
 a bias circuit configured to provide temperature and technology spread compensation to the first chopped circuit, the second chopped circuit, and the third circuit. 
 
     
     
       9. The system of  claim 1 , wherein the sensing system comprises a spinning hall plate sensing system. 
     
     
       10. A system comprising:
 a spinning hall plate sensing system configured to provide input signals; 
 a first chopped circuit configured to switch in response to the input signals crossing a first limit and to provide a first output signal that is valid during two chopping phases; 
 a second chopped circuit configured to switch in response to the input signals crossing a second limit and to provide a second output signal that is valid during another two chopping phases; 
 a multiplexer configured to switch between the first output signal and the second output signal to provide a switched output signal that is valid during all chopping phases; and 
 a clock generator configured to provide clock signals that synchronize chopping of the first chopped circuit and the second chopped circuit. 
 
     
     
       11. The system of  claim 10 , wherein the clock generator spins the spinning hall plate sensing system and chops the first chopped circuit and the second chopped circuit at the same clocking frequency. 
     
     
       12. The system of  claim 10 , wherein the first chopped circuit is a first chopped auto-zeroing comparator and the second chopped circuit is a second chopped auto-zeroing comparator. 
     
     
       13. The system of  claim 10 , comprising:
 a third circuit configured to provide a high resolution output signal that corresponds to the sensed input signals and has a higher resolution than the switched output signal. 
 
     
     
       14. A method comprising:
 providing sensed input signals; 
 outputting a first output signal via a first chopped circuit in response to the input signals crossing a first limit, the first output signal being valid during some chopping phases; 
 outputting a second output signal via a second chopped circuit in response to the input signals crossing a second limit, the second output signal being valid during other chopping phases; and 
 switching between the first output signal and the second output signal via a multiplexer to provide a valid output signal during all chopping phases. 
 
     
     
       15. The method of  claim 14 , wherein the first chopped circuit is a first chopped auto-zeroing comparator and the second chopped circuit is a second chopped auto-zeroing comparator. 
     
     
       16. The method of  claim 14 , comprising:
 clocking the first chopped circuit and the second chopped circuit at the same frequency. 
 
     
     
       17. The method of  claim 14 , comprising:
 outputting a high resolution output signal via a third circuit, wherein the high resolution output signal corresponds to the sensed input signals and has a higher resolution than the valid output signal. 
 
     
     
       18. The method of  claim 17 , comprising:
 providing temperature and technology spread compensation to the first chopped circuit, the second chopped circuit, and the third circuit via a bias circuit. 
 
     
     
       19. The method of  claim 17 , comprising:
 outputting the valid output signal faster than outputting the high resolution output signal. 
 
     
     
       20. The method of  claim 14 , wherein providing the sensed input signals comprises:
 sensing a current magnetically to provide the sensed input signals.