Liquid crystal display

Abstract

A liquid crystal display is disclosed. The liquid crystal display includes a liquid crystal display panel including data lines and gate lines crossing one another and a pixel array including liquid crystal cells arranged in a matrix format according to a crossing structure of the data lines and the gate lines, a source drive circuit supplying a data voltage to the data lines through a plurality of output channels, a gate drive circuit sequentially supplying a gate pulse to the gate lines. The liquid crystal display panel includes link lines that respectively connect the data lines to the output channels of the source drive circuit. The source drive circuit includes a plurality of output channel resistors connected between the output channels and the link lines. Each of the output channel resistors includes a variable resistance circuit.

What is claimed is: 
     
       1. A liquid crystal display comprising:
 a liquid crystal display panel including data lines and gate lines crossing one another and a pixel array including liquid crystal cells arranged in a matrix format according to a crossing structure of the data lines and the gate lines; 
 a source drive circuit including a plurality of output channels, the source drive circuit supplying a data voltage to the data lines through the plurality of output channels; 
 a gate drive circuit sequentially supplying a gate pulse to the gate lines, 
 wherein the liquid crystal display panel includes link lines that respectively connect the data lines to the output channels of the source drive circuit, 
 wherein the source drive circuit includes a plurality of output channel resistors connected between the output channels and the link lines, 
 wherein each of the output channel resistors includes a variable resistance circuit, 
 wherein the variable resistance circuit includes: 
 a first resistor to which the data voltage is input; 
 a multiplexer whose an input terminal is connected to the first resistor; and 
 a second resistor connected to one of a plurality of output terminals of the multiplexer, 
 wherein the second resistor and another output terminal of the plurality of output terminals of the multiplexer are connected in series to the data line, 
 wherein the multiplexer connects the first resistor to one of the second resistor and the data line in response to a predetermined resistance selection signal. 
 
     
     
       2. The liquid crystal display of  claim 1 , wherein resistances of the output channel resistors are inversely proportional to resistances of the link lines. 
     
     
       3. The liquid crystal display of  claim 1 , wherein the source drive circuit includes a circular integrated drive circuit chip supplying the data voltage to all of the data lines inside the pixel array. 
     
     
       4. The liquid crystal display of  claim 3 , wherein the circular integrated drive circuit chip includes a digital-to-analog converter converting digital video data into the data voltage and an output circuit connecting an output of the digital-to-analog converter to the output channel resistors through an output buffer. 
     
     
       5. The liquid crystal display of  claim 4 , wherein the output circuit includes a multichannel selection circuit that disables at least some of the output channels in response to a predetermined multichannel selection signal so that the at least some of the output channels serve as a dummy output channel. 
     
     
       6. The liquid crystal display of  claim 1 , wherein the source drive circuit includes:
 at least one source driver integrated circuit (IC) connected to the data lines through the output channels; and 
 a timing controller that supplies digital video data to the at least one source driver IC and generates a timing control signal for controlling an operation timing of the at least one source driver IC and an operation timing of the gate drive circuit. 
 
     
     
       7. The liquid crystal display of  claim 6 , wherein the at least one source driver IC includes a digital-to-analog converter converting the digital video data into the data voltage and an output circuit connecting an output of the digital-to-analog converter to the output channel resistors through an output buffer. 
     
     
       8. The liquid crystal display of  claim 7 , wherein the output circuit includes a multichannel selection circuit that disables at least some of the output channels in response to a predetermined multichannel selection signal so that the at least some of the output channels serve as a dummy output channel. 
     
     
       9. The liquid crystal display of  claim 1 , wherein adjacent j, where j is an integer equal to or greater than 2 and less than 5, output channel resistors among the plurality of output channel resistors have the same resistance.