Demodulator for high bit rate transmission and corresponding demodulation method

Abstract

Processing method for modulated data transmitted in the form of multiplexed frames (Frame 1 , . . . Frame 10 ) containing symbols that have a symbol frequency. The method comprises a frame selection processing operation performed at least partly at a working frequency below the symbol frequency, and a demodulation processing operation comprising at least a part performed at the working frequency on the selected frames.

What is claimed is: 
     
       1. A method for real-time processing of modulated data transmitted in the form of multiplexed frames containing symbols that have a symbol frequency, comprising:
 a frame selection processing operation performed at least partly at a working frequency below the symbol frequency; and 
 a demodulation processing operation at least in part performed at the working frequency on the selected frames; 
 wherein the symbols are sampled at a sampling frequency and the demodulation of such a frame comprises a predemodulation processing operation including a determination of the symbols based on the samples, and a final demodulation processing operation performed on the symbols and wherein said frame selection processing operation comprises: 
 performing the predemodulation processing operation on all received frames, each received frame including a header; 
 determining, at the working frequency, predemodulated frames to be selected, from their respective headers; and 
 storing at least the selected predemodulated frames in a memory at a storage frequency below the symbol frequency, 
 and further wherein said demodulation processing operation comprises performing, at the working frequency, the final demodulation processing operation on the selected predemodulated frames. 
 
     
     
       2. The method according to  claim 1 , in which determining the predemodulated frames to be selected comprises reading the headers of all the frames at the working frequency. 
     
     
       3. The method according to  claim 2 , in which, until a first header read has been performed, all the predemodulated frames are stored in the memory at a frequency below the symbol frequency and the memory is read from a random address. 
     
     
       4. The method according to  claim 1 , also comprising demodulating a part of at least some of the unselected frames. 
     
     
       5. The method according to  claim 1 , in which the memory is circularly managed. 
     
     
       6. The method according to  claim 5 , in which storing the selected predemodulated frames comprises a continuous storage of all the symbols of the predemodulated frames and inhibiting said storage each time the final demodulation processing operation is performed on a selected predemodulated frame. 
     
     
       7. A method for real-time processing of modulated data transmitted in the form of multiplexed frames containing symbols that have a symbol frequency, comprising:
 a frame selection processing operation performed at least partly at a working frequency below the symbol frequency; and 
 a demodulation processing operation at least in part performed at the working frequency on the selected frames; 
 wherein a frame comprises symbols sampled at a sampling frequency and the frame selection processing operation comprises: 
 storing all the samples of all the frames in a memory; 
 reading, at the working frequency, respective headers of all the frames so as to obtain said frames to be selected; and 
 reading, at the working frequency, the selected frames and stored, and 
 wherein said demodulation processing operation is implemented at the working frequency on the frames read. 
 
     
     
       8. The method according to  claim 7 , in which reading the headers and the selected frames comprises reading a predetermined number of samples preceding the frames and headers to be read. 
     
     
       9. The method according to  claim 7 , in which reading the headers and the selected frames comprises address jumps in said memory. 
     
     
       10. The method according to  claim 9 , in which the header reading step comprises, for each symbol of the header, determining an optimum instant using a phase locked loop and a digitally-controlled oscillator, said determining an optimum instant including, for each address jump, summing, at a frequency set point accumulated by the digitally-controlled oscillator, the number of samples corresponding to the address jump expressed as a number of symbols. 
     
     
       11. A communication appliance, capable of processing in real time, modulated data transmitted in the form of multiplexed frames containing symbols that have a symbol frequency, comprising:
 a subsystem for processing received frames, said subsystem including:
 a selector configured to select, at least partly at a working frequency below the symbol frequency, some of the received frames, and 
 a demodulator configured to perform at least a part of a demodulation processing operation at the working frequency on the selected frames; 
 
 wherein a frame comprises symbols sampled at a sampling frequency and a header, the demodulator comprises a predemodulation module configured to perform, on all the frames, a predemodulation processing operation comprising a determination of the symbols from the samples and wherein the selector comprises: 
 a header processor configured to determine, at the working frequency, predemodulated frames to be selected from their respective headers; and 
 a memory configured to store, at a storage frequency below the symbol frequency, at least the selected predemodulated frames, and 
 wherein the demodulator also comprises: 
 a final demodulation module configured to perform, at the working frequency, on the predemodulated stored frames, a final demodulation processing operation. 
 
     
     
       12. The appliance according to  claim 11 , in which the header processor is configured to read the headers of all the frames at the working frequency. 
     
     
       13. The appliance according to  claim 12 , in which the header processor is configured to store in the memory, at a storage frequency below the symbol frequency, all the predemodulated frames and to read the memory, at the working frequency, from a random address until a first header has been read. 
     
     
       14. The appliance according to  claim 11 , in which the demodulator is also configured to perform a demodulation of a part of at least some of the unselected frames. 
     
     
       15. The appliance according to  claim 11 , in which said memory is a memory with circular management. 
     
     
       16. A communication appliance, capable of processing in real time, modulated data transmitted in the form of multiplexed frames containing symbols that have a symbol frequency, comprising:
 a subsystem for processing received frames, said subsystem including:
 a selector configured to select, at least partly at a working frequency below the symbol frequency, some of the received frames, and 
 a demodulator configured to perform at least a part of a demodulation processing operation at the working frequency on the selected frames; 
 
 wherein a frame comprises symbols sampled at a sampling frequency, and the selector comprises: 
 a memory configured to store all the samples of all the frames; and 
 a header processor configured to read, at the working frequency, the headers of all the frames so as to obtain said frames to be selected, 
 and wherein the demodulator comprises a demodulation module configured to read the selected frames in the memory at the working frequency and also configured to perform a demodulation processing operation at the working frequency on the frames read. 
 
     
     
       17. The appliance according to  claim 16 , in which the header processor and the demodulation module are configured to read a predetermined number of samples preceding the frames and headers to be read. 
     
     
       18. The appliance according to  claim 16 , in which the header processor and the demodulation module are configured to control a memory read pointer so as to perform address jumps in the memory. 
     
     
       19. The appliance according to  claim 18 , in which the demodulation module comprises a phase locked loop with a digitally-controlled oscillator and an adder configured to add, for each address jump, at a frequency set point accumulated by the digitally-controlled oscillator, a number equal to the number of samples corresponding to the address jump expressed as a number of symbols.