Nonvolatile memory and method for verifying the same

Abstract

A nonvolatile memory device includes a cell string including a plurality of memory cells connected in series, a bit line connected to the cell string, a voltage sensing unit configured to apply a verify precharge voltage to the bit line in response to a voltage of a sensing node before a verify operation, a voltage transmission unit configured to apply a voltage of the bit line to the sensing node in a verify operation, and a page buffer configured to determine a voltage of the sensing node in response to data stored therein before a verify operation and to change the data in response to a voltage level of the sensing node in the verify operation.

What is claimed is: 
     
       1. A nonvolatile memory device comprising:
 a cell string including a plurality of memory cells connected in series; 
 a bit line connected to the cell string; 
 a voltage sensing unit configured to apply a verify precharge voltage to the bit line in response to a voltage of a sensing node before a verify operation; 
 a voltage transmission unit configured to apply a voltage of the bit line to the sensing node in the verify operation; and 
 a page buffer configured to determine a voltage of the sensing node in response to data stored therein before the verify operation and to change the data in response to a voltage level of the sensing node in the verify operation, 
 wherein the voltage sensing unit precharges the bit line based on the data stored in the page buffer without connecting the sensing node and the bit line. 
 
     
     
       2. The nonvolatile memory device of  claim 1 , wherein when the voltage of the sensing node is a first voltage, the voltage sensing unit is configured to apply the verify precharge voltage to the bit line, and when the voltage of the sensing node is a second voltage, the voltage sensing unit is configured to disable a supply of the verify precharge voltage to the bit line. 
     
     
       3. The nonvolatile memory device of  claim 2 , wherein, before the verify operation, the page buffer is configured to set the voltage of the sensing node to one of the first voltage and the second voltage that corresponds to a logic value of the data stored therein. 
     
     
       4. The nonvolatile memory device of  claim 2 , wherein the first voltage is a high level voltage and the second voltage is a low level voltage. 
     
     
       5. The nonvolatile memory device of  claim 1 , wherein the memory cell is programmed according to an increment step pulse program (ISPP) scheme for increasing a program voltage by a step voltage each time the programming of a memory cell is repeated. 
     
     
       6. The nonvolatile memory device of  claim 1 , wherein the data stored in the page buffer is changed after detecting a change in a programmed state of a target memory cell of the memory cells. 
     
     
       7. The nonvolatile memory device of  claim 1 , wherein the voltage sensing unit comprises:
 a first transistor having a drain connected to the bit line, a source connected to an internal node, and a gate connected to receive a verify precharge signal, wherein the verify precharge signal is activated before the verify operation; and 
 a second transistor having a drain connected to the internal node, a source receiving the verify precharge voltage, and a gate connected to receive the voltage of the sensing node. 
 
     
     
       8. The nonvolatile memory device of  claim 7 , wherein when the first transistor and the second transistor are turned on, the verify precharge voltage is applied to the bit line. 
     
     
       9. The nonvolatile memory device of  claim 7 , wherein the voltage transmission unit comprises a third transistor having a drain connected to the bit line, a source connected to the sensing node, and a gate coupled to receive a sensing signal, wherein the sensing signal is activated in the verify operation. 
     
     
       10. The nonvolatile memory device of  claim 1 , wherein the stored data of the page buffer indicates whether a program of a target memory cell of the cell string is completed and the voltage sensing unit is configured to apply the verify precharge voltage to the bit line in response to the stored data of the page buffer. 
     
     
       11. The nonvolatile memory device of  claim 9 , wherein, if the stored data of the page buffer indicates that a program of a target memory cell of the cell string is completed, the voltage sensing unit is configured to disable a supply of the verify precharge voltage to the bit line in response to the stored data of the page buffer. 
     
     
       12. A method for verifying a nonvolatile memory device, comprising:
 determining a voltage of a sensing node according to data stored in a page buffer; 
 transmitting a verify precharge voltage to a bit line in response to the voltage of the sensing node; 
 changing a voltage of the bit line in response to a determination as to whether a program of a memory cell is completed; 
 connecting the bit line and the sensing node; and 
 changing the data stored in the page buffer in response to a voltage level of the sensing node; 
 wherein the bit line is charged based on the data stored in the page buffer without connecting the bit line and the sensing node. 
 
     
     
       13. The method of  claim 12 , wherein in the determining of the voltage of the sensing node, the voltage of the sensing node is determined to be one of a first voltage and a second voltage that corresponds to a logic value of the data stored in the page buffer. 
     
     
       14. The method of  claim 13 , wherein in the transmitting of the verify precharge voltage to the bit line, the verify precharge voltage is transmitted to the bit line when the voltage of the sensing node is the first voltage and the verify precharge voltage is not transmitted to the bit line when the voltage of the sensing node is the second voltage. 
     
     
       15. The method of  claim 13 , wherein the first voltage is a high level voltage and the second voltage is a low level voltage.