Neuromimetic homomorphic pattern recognition method and apparatus therefor

Abstract

A method and apparatus for encoding the amplitude of frequency signals, into a temporal electrical spike pattern and a method for decoding the generated pattern by recognizing and classifying it with a correlating (associative pattern recognition) neuron like device. The first part of the system takes signals and converts their amplitude into a set of timed pulses. The timing of that pulse is a function of the amplitude of the incoming signal. Once a series of timed pulses have been created, they can be sent to a decoder. The decoder circuit uses bandpass filters and delays/gains a low pass summation. The recognition portion compares the timed input spikes with a known sample. Only when the input signals match the sample signals will the amplitudes be sufficient to meet the trigger threshold. When the output spike is generated, a pattern match has been found.

I claim: 
     
       1. A method of neuromimetic homomorphic pattern recognition by encoding selected component parts of a decomposed broadband signal comprising the steps of:
 a) passing each component input signal through a rectifier to produce a Direct Current (DC) level; 
 b) passing a sync pulse through a bandpass filter, which then generates a damped sinusoidal wave; 
 c) summing the DC level and the damped sinusoid to produce an output voltage V sum ; 
 d) sending the voltage V sum  to a comparator circuit; 
 e) comparing the voltage V sum  to a threshold voltage V th ; and 
 f) generating an output spike when the level of the voltage V sum  is greater than the level of the voltage V th . 
 
     
     
       2. The method of  claim 1  further comprising the step of:
 a) after step “c” and before “step “d”, passing the voltage V sum  through a lowpass filter. 
 
     
     
       3. The method of  claim 1  further including a method of decoding an encoded signal comprising the steps of:
 a) passing a plurality of encoded pulses produced by a plurality of encoders though a plurality of bandpass filters producing a plurality of output signals; 
 b) passing the plurality of output signals through a plurality of delay circuit modules to produce a plurality of phase-shifted signals based on a preset delay time; 
 c) passing the plurality of phase-shifted signals through a summing circuit to produce an output voltage V sum ; 
 d) sending the voltage V sum  to a comparator circuit; 
 e) comparing the voltage V sum  to a threshold voltage V th ; and 
 f) generating an output spike when the level of the voltage V sum  is greater than the level of the voltage V th . 
 
     
     
       4. The method of  claim 3  further comprising the step of:
 a) after passing the plurality of phase-shifted signals through a summing circuit to produce an output voltage V sum  and before sending the voltage V sum  to a comparator circuit of  claim 3 , passing the voltage V sum  through a lowpass filter. 
 
     
     
       5. The method of  claim 3  where in step a of  claim 3 , the sinusoid waveforms of each of said plurality of output signals has a Gaussian like probability weight imparted to it. 
     
     
       6. An apparatus for neuromimetic homomorphic pattern recognition by encoding a signal comprising:
 a) a an input signal; 
 b) a rectifier in operative communication with said input signal, whereby said full wave rectifier produce a DC level output; 
 c) sync pulse generated with the arrival of said input signal; 
 d) a bandpass filter, in operative communication with said sync pulse, whereby said bandpass filter generates a damped sinusoidal output wave; 
 e) a summing circuit, having an output, in electrical communication with said full wave rectifier and said band pass filter whereby the dc level and the damped sinusoid are added to produce an output voltage V sum  therefrom; 
 f) a comparator circuit, having an input and an output, in electrical communication with the output of said summing circuit; and 
 g) a threshold voltage V th  in operative communication with said comparator circuit; 
 h) whereby when the level of the voltage V sum  is greater than the level of the voltage V th , an output spike is generated. 
 
     
     
       7. The apparatus of  claim 6  further comprising:
 a) a lowpass filter, in electrical communication with the output of the summing circuit and the input to the comparator circuit. 
 
     
     
       8. The apparatus of  claim 6  further including a decoding circuit comprising:
 a) a plurality of encoded pulses produced by a plurality of encoders; 
 b) a plurality of bandpass filters in operative communication with said plurality of encoded pulses, whereby each of said plurality of bandpass filters receives one of said plurality of encoded pulses, said plurality of bandpass filters producing a plurality of output signals; 
 c) a plurality of delay modules in operative communication with said plurality of output signals to produce a plurality of phase-shifted signals based on a preset delay time; 
 d) a summing circuit, having an output, in operative communication with the plurality of phase-shifted signals said summing module producing an output voltage V sum ; 
 e) a comparator circuit, having an input and an output, in operative communication with the voltage V sum ; and 
 f) a threshold voltage V th  in operative communication with said comparator circuit; 
 g) whereby when the level of the voltage V sum  is greater than the level of the voltage V th , an output spike is generated by said comparator circuit. 
 
     
     
       9. The apparatus of  claim 8  further comprising:
 a) a lowpass filter, in electrical communication with the output of the summing circuit and the input to the comparator circuit. 
 
     
     
       10. The apparatus of  claim 8  wherein the use of a sinusoid waveform in each of said plurality of phase-shifted signals imparts a Gaussian like probability weight to each of said plurality of phase-shifted signals.