Semiconductor integrated circuit device

Abstract

A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate.

What is claimed is: 
     
       1. A semiconductor integrated circuit device comprising:
 a substrate of a first conductivity type in which a first amplifier area and a second amplifier area are defined for a pair of amplifiers; 
 a first well of a second conductivity type, a first pocket well of the first conductivity type that is electrically separated from the first well, and a first deep well of the second conductivity type, which surrounds the first pocket well and is adjacent to but electrically separated from the first well; and 
 a second well of the second conductivity type, a second pocket well of the first conductivity type that is electrically separated from the second well, and a second deep well of the second conductivity type, which surrounds the second pocket well, and is adjacent to but electrically separated from the second well, 
 wherein the first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate, and 
 wherein the second well is connected to a high median power supply circuit potential and each of the first deep well and the first pocket well are connected to a low median power supply circuit potential. 
 
     
     
       2. The semiconductor integrated circuit device of  claim 1 , wherein the first well and the second well are directly surrounded by the substrate. 
     
     
       3. The semiconductor integrated circuit device of  claim 2 , wherein the first deep well and the first well are connected to different circuit potentials. 
     
     
       4. The semiconductor integrated circuit device of  claim 3 , wherein the first deep well is connected to a lower circuit potential than the first well is connected to. 
     
     
       5. The semiconductor integrated circuit device of  claim 4 , wherein the first well is connected to a power supply circuit potential, and the first deep well is connected to a low median of the power supply circuit potential. 
     
     
       6. The semiconductor integrated circuit device of  claim 5 , wherein the first pocket well is connected to the same circuit potential as the first deep well. 
     
     
       7. The semiconductor integrated circuit device of  claim 1   1 , wherein each of the substrate, the second deep well, and the second pocket well are connected to a circuit ground potential. 
     
     
       8. The semiconductor integrated circuit device of  claim 1 , wherein the first conductivity type is P-type, and the second conductivity type is N-type. 
     
     
       9. The semiconductor integrated circuit device of  claim 1 , further comprising a p-channel metal oxide semiconductor (PMOS) transistor which is formed on each of the first well and the second well and an n-channel metal oxide semiconductor (NMOS) transistor which is formed on each of the first pocket well and the second pocket well. 
     
     
       10. A semiconductor integrated circuit device comprising:
 a P-type substrate; 
 a first amplifier area defined in the substrate including: 
 an N-type first well formed in the substrate; 
 an N-type first deep well formed in the substrate and electrically isolated from the N-type first well; 
 a P-type first pocket well formed in the N-type first deep well; 
 a first NMOS transistor formed in the P-type first pocket well, 
 wherein the N-type first well and the N-type first deep well are connected to different circuit potentials and the N-type first deep well and P-type first pocket well are connected to the same circuit potentials; and 
 a second amplifier area defined in the substrate including: 
 an N-type second well formed in the substrate; 
 an N-type second deep well formed in the substrate and electrically isolated from the N-type second well; 
 a P-type second pocket well formed in the N-type second deep well and 
 a second NMOS transistor formed in the P-type second pocket well; 
 wherein the N-type second well and the N-type second deep well are connected to different circuit potentials and the N-type second deep well and P-type second pocket well and connected to the same circuit potentials. 
 
     
     
       11. The semiconductor integrated circuit device of  claim 10 , wherein the N-type first well directly contacts the substrate. 
     
     
       12. The semiconductor integrated circuit device of  claim 10 , wherein the N-type first well is connected to a power supply circuit potential, and the P-type first pocket well and the N-type first deep well are connected to a low median power supply circuit potential. 
     
     
       13. The semiconductor integrated circuit device of  claim 12 , wherein the second well is connected to a high median power supply circuit potential, and the second deep well and the second pocket well are connected to a ground supply circuit potential. 
     
     
       14. An integrated amplifier circuit, comprising:
 a substrate having a first conductivity type, the substrate having a first amplifier region and a second amplifier region for a pair of amplifiers; 
 a first well having a second conductivity type, a first pocket well having the first conductivity type, and a first deep well having the second conductivity type, the first deep well surrounding the first pocket well and being separated from the first well; and 
 a second well having the second conductivity type, a second pocket well having the first conductivity type, and a second deep well having the second conductivity type, the second deep well surrounding the second pocket well and being separated from the second well; wherein: 
 the first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate; 
 the second well, the second pocket well, and the second deep well are formed in the second amplifier region; 
 the amplifier circuit is configured to respond to applied voltages by operating in one of first and second modes, and 
 a p-channel metal oxide semiconductor (PMOS) transistor which is formed on each of the first well and the second well and an n-channel metal oxide semiconductor (NMOS) transistor which is formed on each of the first pocket well and the second pocket well. 
 
     
     
       15. The integrated amplifier circuit of  claim 14 , wherein the first mode is a split-rail-amplifier mode. 
     
     
       16. The integrated amplifier circuit of  claim 15 , wherein the second mode is a rail-to-rail-amplifier mode. 
     
     
       17. The integrated amplifier circuit of  claim 14 , wherein, in the first mode, a power supply voltage is applied to the first well, and a low median of the power supply voltage is applied to the first deep well. 
     
     
       18. The integrated amplifier circuit of  claim 17 , wherein, in the first mode, a ground voltage is applied to the second deep well and the second pocket well. 
     
     
       19. The integrated amplifier circuit of  claim 14 , wherein, in the second mode, a power supply voltage is applied to the first well, and a ground voltage is applied to the first deep well and the first pocket well. 
     
     
       20. The integrated amplifier circuit of  claim 19 , wherein the same voltage is applied to each of the first well and the second well. 
     
     
       21. The integrated amplifier circuit of  claim 14 , wherein the first conductivity type is P-type, and the second conductivity type is N-type.