Thin film transistor and display device

Abstract

To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a gate electrode over a substrate; 
 a gate insulating layer over the gate electrode; 
 a conductive layer over the gate insulating layer, the conductive layer having an opening and overlapping with the gate electrode; 
 an amorphous semiconductor layer over the conductive layer, the amorphous semiconductor layer having a region where the amorphous semiconductor layer is directly in contact with the gate insulating layer through the opening in the conductive layer; 
 a first wiring over the amorphous semiconductor layer, the first wiring overlapping with the region and being electrically connected to the amorphous semiconductor layer; and 
 a second wiring over the amorphous semiconductor layer, the second wiring overlapping with the conductive layer and being electrically connected to the amorphous semiconductor layer. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein the conductive layer is a metal layer, a metal nitride layer, a metal carbide layer, a metal boride layer, or a metal silicide layer. 
     
     
       3. The semiconductor device according to  claim 1 , wherein the conductive layer is a semiconductor layer containing an impurity element serving as a donor. 
     
     
       4. The semiconductor device according to  claim 3 , wherein a concentration of the donor in the semiconductor layer is greater than or equal to 1×10 18  atoms/cm 3  and less than or equal to 2×10 20  atoms/cm 3 . 
     
     
       5. The semiconductor device according to  claim 1 , wherein the conductive layer is a microcrystalline silicon layer containing an impurity element serving as a donor. 
     
     
       6. The semiconductor device according to  claim 5 , wherein a concentration of the donor in the microcrystalline silicon layer is greater than or equal to 1×10 18  atoms/cm 3  and less than or equal to 2×10 20  atoms/cm 3 . 
     
     
       7. The semiconductor device according to  claim 1 , wherein the amorphous semiconductor layer is an amorphous silicon layer. 
     
     
       8. A semiconductor device comprising:
 a gate electrode over a substrate; 
 a gate insulating layer over the gate electrode; 
 a conductive layer over the gate insulating layer, the conductive layer having an opening and overlapping with the gate electrode; 
 a buffer layer over the conductive layer, the buffer layer having an opening; 
 an amorphous semiconductor layer over the buffer layer, the amorphous semiconductor layer having a region where the amorphous semiconductor layer is directly in contact with the gate insulating layer through the opening in the buffer layer and the opening in the conductive layer; 
 a first impurity semiconductor layer over the amorphous semiconductor layer, the first impurity semiconductor layer overlapping with the region; 
 a second impurity semiconductor layer over the amorphous semiconductor layer, the second impurity semiconductor layer overlapping with the conductive layer; 
 a first wiring over the first impurity semiconductor layer, the first wiring being in contact with the first impurity semiconductor layer; and 
 a second wiring over the second impurity semiconductor layer, the second wiring being in contact with the second impurity semiconductor layer. 
 
     
     
       9. The semiconductor device according to  claim 8 ,
 wherein the first impurity semiconductor layer is a circular film, and 
 wherein the second impurity semiconductor layer is a ring-shaped film. 
 
     
     
       10. The semiconductor device according to  claim 8 , wherein the conductive layer is a metal layer, a metal nitride layer, a metal carbide layer, a metal boride layer, or a metal silicide layer. 
     
     
       11. The semiconductor device according to  claim 8 , wherein the conductive layer is a semiconductor layer containing an impurity element serving as a donor. 
     
     
       12. The semiconductor device according to  claim 11 , wherein a concentration of the donor in the semiconductor layer is greater than or equal to 1×10 18  atoms/cm 3  and less than or equal to 2×10 20  atoms/cm 3 . 
     
     
       13. The semiconductor device according to  claim 8 , wherein the conductive layer is a microcrystalline silicon layer containing an impurity element serving as a donor. 
     
     
       14. The semiconductor device according to  claim 13 , wherein a concentration of the donor in the microcrystalline silicon layer is greater than or equal to 1×10 18  atoms/cm 3  and less than or equal to 2×10 20  atoms/cm 3 . 
     
     
       15. The semiconductor device according to  claim 8 , wherein the amorphous semiconductor layer is an amorphous silicon layer. 
     
     
       16. The semiconductor device according to  claim 8 , wherein the buffer layer is an amorphous silicon layer containing halogen.