Power management circuit and liquid crystal display using same

Abstract

A power management circuit comprising a power-on signal input, an output terminal a control unit, a switching unit, and a discharge unit. The control unit configured to selectively turn on the switching unit to output a power-on signal to a display module and selectively turn off the switching unit to cut off an electrical connection between the power-on signal input and the output terminal. The discharge unit configured to discharge residual electrical charges in the display module when the switching unit is turned off.

What is claimed is: 
     
       1. A power management circuit, comprising:
 a power-on signal input configured to receive a power-on signal; 
 an output terminal configured to provide the power-on signal to a load, the output terminal grounded via a discharge unit; 
 a switching unit electrically connected between the power-on signal input and the output terminal, the switching unit comprising a first transistor and a first resistor, the first transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the power-on signal input connected to the first conducting terminal of the first transistor, and the power-on signal input connected to the control terminal of the first transistor via the first resistor; 
 a control signal input configured to receive a control signal; and 
 a control unit electrically connected to the control signal input, the control unit configured to selectively turn on the switching unit to output the power-on signal to a display module via the output terminal and selectively turn off the switching unit to cut off an electrical connection between the power-on signal input and the output terminal, the discharge unit configured to discharge residual electrical charges in the display module when the switching unit is turned off. 
 
     
     
       2. The power management circuit of  claim 1 , wherein the control unit comprises a second resistor, a third resistor and a second transistor; the second transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the control terminal of the second transistor is electrically coupled to the control signal input, the first conducting terminal of the second transistor is connected to the first resistor, the second conducting terminal of the second transistor is grounded. 
     
     
       3. The power management circuit of  claim 1 , wherein the discharge unit comprises a third transistor, a fourth resistor and a fifth resistor; the third transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the first conducting terminal of the third transistor is electrically coupled to the output terminal via the fourth resistor, the second conducting terminal of the third transistor is grounded; the control terminal of the third transistor is electrically coupled to the switching unit via the fifth resistor. 
     
     
       4. The power management circuit of  claim 3 , wherein when the control signal is a logic low signal, the third transistor is conductive, and the discharge unit releases residual charges in the display module. 
     
     
       5. The power management circuit of  claim 1 , further comprising a filter unit configured to filter noise of the power-on signal and transmit a direct current to the display module. 
     
     
       6. The power management circuit of  claim 1 , further comprising a delay unit, the delay unit providing a delay time for the control unit. 
     
     
       7. The power management circuit of  claim 6 , wherein the delay unit includes an RC delay circuit configured to provide the delay time for the control unit. 
     
     
       8. A liquid crystal display, comprising:
 a driver circuit configured to output a control signal; 
 a display module; and 
 a power management circuit comprising: 
 a power-on signal input configured to receive a power-on signal; 
 an output terminal configured to selectively provide the power-on signal to the display module; 
 a discharge unit electrically connected between the output terminal and ground; 
 a switching unit electrically connected between the power-on signal input and the output terminal, the switching unit comprising a first transistor and a first resistor, the first transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the power-on signal input connected to the first conducting terminal of the first transistor, and the power-on signal input connected to the control terminal of the first transistor via the first resistor; 
 a control signal input configured to receive the control signal; and 
 a control unit electrically connected to the control signal input, the control unit configured to turn on the switching unit to output the power-on signal to the display module via the output terminal and turn off the switching unit to cut off an electrical connection between the power-on signal input and the output terminal, 
 wherein the discharge unit discharges residual electrical charges in the display module when the switching unit is turned off. 
 
     
     
       9. The liquid crystal display of  claim 8 , wherein the control unit comprises a second resistor, a third resistor and a second transistor; the second transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the control terminal of the second transistor is electrically coupled to the control signal input, the first conducting terminal of the second transistor is connected to the first resistor, the second conducting terminal of the second transistor is grounded. 
     
     
       10. The liquid crystal display of  claim 9 , the power management circuit further comprising a delay unit, the delay unit provides a delay time for the control unit. 
     
     
       11. The liquid crystal display of  claim 10 , wherein the delay unit includes an RC delay circuit configured to provide the delay time for the control unit. 
     
     
       12. The liquid crystal display of  claim 8 , wherein the discharge unit comprises a third transistor, a fourth resistor and a fifth resistor; the third transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the first conducting terminal of the third transistor is electrically coupled to the output terminal via the fourth resistor, the second conducting terminal of the third transistor is grounded; the control terminal of the third transistor is electrically coupled to the switching unit via the fifth resistor. 
     
     
       13. The liquid crystal display of  claim 12 , wherein when the control signal is a logic low signal, the third transistor is conductive. 
     
     
       14. The liquid crystal display of  claim 8 , wherein the power management circuit further comprising a filter unit, the filter unit configured to filter noise of the power-on signal and transmit direct current to the display module. 
     
     
       15. A power management circuit, comprising:
 a power-on signal input configured to receive a power-on signal; 
 an output terminal configured to provide the power-on signal to a load, the output terminal grounded via a discharge unit; 
 a switching unit electrically connected between the power-on signal input and the output terminal, the switching unit comprising a first transistor and a first resistor, the first transistor comprising a control terminal, a first conducting terminal and a second conducting terminal; the power-on signal input connected to the first conducting terminal of the first transistor, and the power-on signal input connected to the control terminal of the first transistor via the first resistor, 
 a control signal input configured to receive a first control signal and a second control signal; 
 a control unit electrically connected to the control signal input, and 
 wherein when the control unit receiving the first control signal, the power-on signal is transmitted to the load via the first transistor; when the control unit receiving the second control signal, the first transistor turns off and the discharge unit discharges residual electrical charges in the load when the switching unit is turned off. 
 
     
     
       16. The power management circuit of  claim 15 , further comprising a delay unit, the delay unit providing a delay time for the control unit. 
     
     
       17. The power management circuit of  claim 16 , wherein the delay unit comprises an RC delay circuit configured to provide the delay time for the control unit.