P
US8638148B2ActiveUtilityPatentIndex 51

Edge rate control

Assignee: LLEWELLYN WILLIAM DPriority: Oct 7, 2009Filed: Oct 7, 2010Granted: Jan 28, 2014
Est. expiryOct 7, 2029(~3.3 yrs left)· nominal 20-yr term from priority
Inventors:LLEWELLYN WILLIAM D
H03K 17/164
51
PatentIndex Score
1
Cited by
19
References
15
Claims

Abstract

This document discusses, among other things, a system and method for reducing electromagnetic interference of a switched signal. In an example, a switched input signal can be received at an input and a transition rate of an edge rate controlled, switched output signal can be controlled in response to the received switched input signal.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An apparatus for reducing electro-magnetic interference, the apparatus comprising:
 an input configured to receive a switched input signal; 
 an output configured to provide an edge rate controlled, switched output signal corresponding to the received switched input signal; 
 a controller responsive to the received switched input signal, the controller including:
 an integrating amplifier configured to control a transition rate of the edge rate controlled, switched output signal between first and second signal levels, and 
 wherein the integrating amplifier includes:
 a first amplifier having a first input node and an output node coupled to the output; and 
 a first capacitor coupled between the first input node and the output node of the amplifier, 
 
 
 wherein the controller includes a first selection circuit configured to selectively couple first and second current sources to the first input node of the amplifier to set the transition rate of the edge rate controlled, switched output signal between the first and second signal levels; and 
 wherein the first amplifier includes complementary first and second output transistors coupled in series between a supply node and a reference node, the output node including a node configured to couple the first output transistor in series with the second output transistor. 
 
     
     
       2. The apparatus of  claim 1 , wherein the amplifier includes first and second buffers configured to isolate a capacitance of the first and second output transistors from the input node;
 wherein the first buffer is coupled between the first input node and a control node of the first output transistor; and 
 wherein the second buffer is coupled between the first input node and a control node of the second output transistor. 
 
     
     
       3. The apparatus of  claim 2 , including a level shifter coupled between an input of the first buffer and an input of the second buffer. 
     
     
       4. The apparatus of  claim 2 , wherein the amplifier includes a second input node coupled to the input of the second buffer;
 wherein the integrating amplifier includes a second capacitor coupled between the second input node and the output node of the amplifier; and 
 wherein the controller includes a second selection circuit configured to selectively couple third and fourth current sources to the second input node of the amplifier to set the transition rate of the edge rate controlled, switched signal between the first and second signal levels. 
 
     
     
       5. The apparatus of  claim 4 , including:
 a delay circuit coupled to the output and configured to provide a delay control signal; 
 a first bypass switch configured to couple the output to a first reference voltage using the delay control signal; and 
 a second bypass switch configured to couple the output to a second reference voltage using the delay control signal. 
 
     
     
       6. The apparatus of  claim 5 , including a voltage tie-off circuit configured to reduce a response time of the integrating amplifier in response to a transition of the received switched input signal between first and second signal levels, the voltage tie-off circuit including:
 a first voltage source selectively coupled to the first input node when the output is at a first signal level; and 
 a second voltage source selectively coupled to the first input node when the output is at a second signal level. 
 
     
     
       7. The apparatus of  claim 1 , including an overshoot limiter coupled to the output and configured to exchange current with a load coupled to the output to reduce voltage overshoot as a voltage of the output reaches the first and second signal levels. 
     
     
       8. A method for reducing electro-magnetic interference, the method comprising:
 receiving a switched input signal at an input; 
 controlling a transition rate of an edge rate controlled, switched output signal in response to the received switched input signal; 
 providing the edge rate controlled, switched output signal at an output; 
 wherein the controlling the transition rate includes controlling the transition rate of the edge rate controlled, switched output signal between first and second signal levels using an integrating amplifier; 
 selectively coupling the output to a first voltage source after a transition from the second signal level to the first signal level; 
 selectively coupling the output to a second voltage source after a transition from the first signal level to the second signal level; and 
 wherein the controlling the transition rate includes:
 detecting an signal level of the output between the first signal level and the second signal level using a comparator coupled to the output; 
 initiating a delay using a delay element coupled to the comparator; 
 selectively coupling the output to at least one of a first or second voltage source in response to an expiration of the delay; and 
 disabling the integrating amplifier. 
 
 
     
     
       9. An apparatus for reducing electro-magnetic interference, the apparatus comprising:
 an input configured to receive a switched input signal; 
 an output configured to provide an edge rate controlled, switched output signal corresponding to the received switched input signal; 
 a controller responsive to the received switched input signal, the controller including:
 an integrating amplifier configured to control a transition rate of the edge rate controlled, switched output signal between first and second signal levels, and 
 wherein the integrating amplifier includes:
 a first amplifier having a first input node and an output node coupled to the output; and 
 a first capacitor coupled between the first input node and the output node of the amplifier, and 
 
 wherein the controller includes a first selection circuit configured to selectively couple first and second current sources to the first input node of the amplifier to set the transition rate of the edge rate controlled, switched output signal between the first and second signal levels; and 
 
 wherein the apparatus includes:
 a delay circuit coupled to the output and configured to provide a delay control signal; 
 a first bypass switch configured to couple the output to a first reference voltage using the delay control signal; and 
 a second bypass switch configured to couple the output to a second reference voltage using the delay control signal. 
 
 
     
     
       10. The apparatus of  claim 9 , including an overshoot limiter coupled to the output and configured to exchange current with a load coupled to the output to reduce voltage overshoot as a voltage of the output reaches the first and second signal levels. 
     
     
       11. The apparatus of  claim 9 , wherein the delay circuit includes:
 a comparator configured to detect an output signal level between the first signal level and the second signal level; and 
 a delay element coupled to an output of the comparator and configured to switch the delay control signal a predetermined delay interval after the comparator detects the output signal level between the first signal level and the second signal level. 
 
     
     
       12. The apparatus of  claim 11 , wherein the comparator is configured to detect an output signal level substantially midway between the first signal level and the second signal level. 
     
     
       13. The apparatus of  claim 12 , wherein the predetermined delay interval is about 10 nanoseconds. 
     
     
       14. An apparatus for reducing electro-magnetic interference, the apparatus comprising:
 an input configured to receive a switched input signal; 
 an output configured to provide an edge rate controlled, switched output signal corresponding to the received switched input signal; 
 a controller responsive to the received switched input signal, the controller including:
 an integrating amplifier configured to control a transition rate of the edge rate controlled, switched output signal between first and second signal levels, and 
 wherein the integrating amplifier includes:
 a first amplifier having a first input node and an output node coupled to the output; and 
 a first capacitor coupled between the first input node and the output node of the amplifier; 
 
 
 an overshoot limiter coupled to the output and configured to exchange current with a load coupled to the output to reduce voltage overshoot as a voltage of the output reaches the first and second signal levels; and 
 wherein the controller includes a first selection circuit configured to selectively couple first and second current sources to the first input node of the amplifier to set the transition rate of the edge rate controlled, switched output signal between the first and second signal levels. 
 
     
     
       15. A method for reducing electro-magnetic interference, the method comprising:
 receiving a switched input signal at an input; 
 controlling a transition rate of an edge rate controlled, switched output signal in response to the received switched input signal; 
 providing the edge rate controlled, switched output signal at an output; 
 wherein the controlling the transition rate includes controlling the transition rate of the edge rate controlled, switched output signal between first and second signal levels using an integrating amplifier; 
 selectively coupling the output to a first voltage source after a transition from the second signal level to the first signal level; 
 selectively coupling the output to a second voltage source after a transition from the first signal level to the second signal level; and 
 wherein the controlling the transition rate includes:
 coupling a first current source to a first input of the integrating amplifier to generate a first transition from the first signal level to the second signal level over a predetermined interval in response to a first transition of the received switched signal; 
 coupling a second current source to a first input of the integrating amplifier to generate a second transition from the second signal level to the first signal level over the predetermined interval in response to a second transition of the received switched signal; 
 coupling a third current source to a second input of the integrating amplifier to generate a first transition from the first signal level to the second signal level over a predetermined interval in response to a first transition of the received switched signal; and 
 coupling a fourth current source to the second input of the integrating amplifier to generate a second transition from the second signal level to the first signal level over the predetermined interval in response to a second transition of the received switched signal.

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