US8654042B2ActiveUtilityA1

Display apparatus and display driving method

71
Assignee: SUGIMOTO HIDEKIPriority: Jan 14, 2010Filed: Jan 6, 2011Granted: Feb 18, 2014
Est. expiryJan 14, 2030(~3.5 yrs left)· nominal 20-yr term from priority
G09G 2300/0819G09G 2320/0252G09G 2320/043G09G 2320/0233G09G 2300/0866G09G 2300/0842G09G 3/3233
71
PatentIndex Score
2
Cited by
15
References
5
Claims

Abstract

A display apparatus includes: a pixel array in which pixel circuits each having a light emitting device, a drive transistor, a sampling transistor, and a retention capacity; a signal selector that supplies threshold correction reference voltages and a video signal voltages as to signal lines arranged in columns on the pixel array; a drive control scanner that provides power supply pulses to power supply control lines arranged in rows on the pixel array and applies drive voltages to the drive transistors; and a write scanner that provides scan pulses to write control lines arranged in rows on the pixel array to control the sampling transistors and executes input of the threshold correction reference voltages and the video signal voltages to the pixel circuits, and brings the sampling transistors into conduction by the scan pulses at plural times when the signal line voltages are the threshold correction reference voltages in order to execute plural threshold corrections in non-emission periods of one light emission cycles of the pixels circuits.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An apparatus comprising:
 a pixel array in which pixel circuits are arranged in a matrix, each pixel circuit having
 (a) a light emitting device, 
 (b) a drive transistor that applies a current in response to a gate-source voltage to the light emitting device, 
 (c) a retention capacity that provides an input potential to the drive transistor and holds the input potential dependent on a threshold voltage of the drive transistor and an input video signal voltage, and 
 (d) a sampling transistor that inputs a signal line voltage to the retention capacity; 
 
 a signal selector that supplies threshold correction reference voltages and the video signal voltages as the signal line voltages to respective signal lines arranged in columns on the pixel array; 
 a drive control scanner that provides power control pulses to respective power supply control lines arranged in rows on the pixel array and applies drive voltages to the drive transistors of the pixel circuits; and 
 a write scanner that provides scan pulses to respective write control lines arranged in rows on the pixel array to control the sampling transistors of the pixel circuits and executes input of the threshold correction reference voltages and the video signal voltages to the respective pixel circuits, and brings the sampling transistors into conduction by the scan pulses at plural times when the signal line voltages are the threshold correction reference voltages in order to execute plural threshold corrections in non-emission periods of one light emission cycles of the respective pixels circuits, 
 wherein,
 pre-bootstrap that raises the input potential is executed in a predetermined period before start of the first threshold correction in the plural threshold corrections, 
 the predetermined period starts when the drive control scanner applies the drive voltage by way of the power control pulse and ends when the write scanner brings the sampling transistor into conduction by way of the scan pulse for the first threshold correction, and 
 the predetermined period is shorter than half of a horizontal period of the signal line voltage and shorter than a period for executing the first threshold correction in the plural threshold corrections. 
 
 
     
     
       2. A method for driving a display apparatus including: (a) a pixel array in which pixel circuits are arranged in a matrix, each pixel circuit having (i) a light emitting device, (ii) a drive transistor that applies a current in response to a gate-source voltage to the light emitting device, (iii) a retention capacity that provides an input potential to the drive transistor and holds the input potential dependent on a threshold voltage of the drive transistor and an input video signal voltage, and (iv) a sampling transistor that inputs a signal line voltage to the retention capacity; (b) a signal selector that supplies threshold correction reference voltages and the video signal voltages as the signal line voltages to respective signal lines arranged in columns on the pixel array; (c) a drive control scanner that provides power control pulses to respective power supply control lines arranged in rows on the pixel array and applies drive voltages to the drive transistors of the pixel circuits; and (d) a write scanner that provides scan pulses to respective write control lines arranged in rows on the pixel array and controls the sampling transistors of the pixel circuits and executes input of the threshold correction reference voltages and the video signal voltages to the respective pixel circuits, the method comprising the steps of:
 bringing the sampling transistors into conduction by the scan pulses at plural times using the write scanner when the signal line voltages are the threshold correction reference voltages in order to execute plural threshold corrections in non-emission periods of one light emission cycles of the respective pixels circuits; and 
 executing pre-bootstrap that raises the input potential in a predetermined period before start of the first threshold correction in the plural threshold corrections, 
 wherein,
 the predetermined period starts when the drive control scanner applies the drive voltage by way of the power control pulse and ends when the write scanner brings the sampling transistor into conduction by way of the scan pulse for the first threshold correction, and 
 the predetermined period is shorter than half of a horizontal period of the signal line voltage and shorter than a period for executing the first threshold correction in the plural threshold corrections. 
 
 
     
     
       3. The apparatus of  claim 1 , wherein the source voltage has a larger rise in the predetermined period with respect to the pre-bootstrap when a mobility of the drive transistor is higher. 
     
     
       4. The method of  claim 2 , wherein the source voltage has a larger rise in the predetermined period with respect to the pre-bootstrap when a mobility of the drive transistor is higher. 
     
     
       5. The method of  claim 2 , wherein the pre-bootstrap is executed by the drive control scanner applying the drive voltage in the predetermined period before the write scanner brings the sampling transistor into conduction by the scan pulse for the first threshold correction.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.