US8789003B1ActiveUtility

Millimeter wave phase shifters using tunable transmission lines

92
Assignee: IBMPriority: Apr 22, 2013Filed: Apr 22, 2013Granted: Jul 22, 2014
Est. expiryApr 22, 2033(~6.8 yrs left)· nominal 20-yr term from priority
G06F 30/36G06F 11/22G06F 30/00G06F 30/373
92
PatentIndex Score
17
Cited by
9
References
19
Claims

Abstract

Methods for creating a tunable phase shifter include setting physical dimension limits for the tunable phase shifter; determining electrical parameters for the tunable phase shifter, including a characteristic impedance limit and a maximum inductance tuning range, based on the physical dimension limits using a processor; and determining physical dimensions for an inductance tuning transistor and a capacitor tuning transistor, such that a characteristic impedance range is minimized.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for creating a tunable phase shifter, comprising:
 setting physical dimension limits for the tunable phase shifter; 
 determining electrical parameters for the tunable phase shifter, including a characteristic impedance limit and a maximum inductance tuning range, based on the physical dimension limits using a processor; and 
 determining physical dimensions for an inductance tuning transistor and a capacitor tuning transistor, such that a characteristic impedance range is minimized. 
 
     
     
       2. The method of  claim 1 , wherein determining physical dimensions for the capacitance tuning transistor comprises:
 determining a target capacitance for the capacitance tuning transistor based on the electrical parameters and a target capacitance range; and 
 determining a physical width of the capacitance tuning transistor based on a capacitance-per-width factor associated with a given manufacturing technology. 
 
     
     
       3. The method of  claim 2 , wherein determining physical dimensions for the inductance tuning transistor comprises determining a physical width of the inductance tuning transistor based on the determined target capacitance for the capacitance tuning transistor that minimizes a difference between a high characteristic impedance and a low characteristic impedance. 
     
     
       4. The method of  claim 1 , further comprising determining resistance and inductance values of and between phase shifter components based on the determined electrical parameters to produce simulated circuit with a target phase shift range. 
     
     
       5. The method of  claim 1 , further comprising determining whether a tuning range of a tunable phase shifter based on the determined electrical and physical parameters meets or exceeds a target phase shift range. 
     
     
       6. The method of  claim 5 , further comprising adjusting the physical dimension limits and repeating said steps of determining if the tuning range is below the target phase shift range. 
     
     
       7. The method of  claim 5 , further comprising calculating the tuning range of the tunable phase shifter according to a determined first capacitance between a signal line and a crossing line; a determined second capacitance between the crossing line, an inductance return line, and all grounded structures; and a capacitance of the capacitor tuning transistor. 
     
     
       8. The method of  claim 7 , wherein the tuning range of the tunable phase shifter is calculated as the ratio C HIGH /C LOW =(C A +C B +C FET )/(C B +C FET ), where C HIGH  is a maximum tunable capacitance, C LOW  is a minimum tunable capacitance, C A  is the determined first capacitance, C B  is the determined second capacitance, and C FET  is the capacitance of the capacitor tuning transistor. 
     
     
       9. The method of  claim 1 , wherein the physical dimension limits include a width of a signal line, a width of ground lines, a spacing between the signal line and the ground lines, and a width of crossing lines. 
     
     
       10. A computer readable storage medium comprising a computer readable program for creating a tunable phase shifter, wherein the computer readable program when executed on a computer causes the computer to perform the steps of:
 setting physical dimension limits for the tunable phase shifter; 
 determining electrical parameters for the tunable phase shifter, including a characteristic impedance limit and a maximum inductance tuning range, based on the physical dimension limits using a processor; and 
 determining physical dimensions for an inductance tuning transistor and a capacitor tuning transistor, such that a characteristic impedance range is minimized. 
 
     
     
       11. A system for creating a tunable phase shifter, comprising:
 a parameter module configured to set physical dimension limits for the tunable phase shifter and to determine electrical parameters for the tunable phase shifter, including a characteristic impedance limit and a maximum inductance tuning range, based on the physical dimension limits using a processor; and 
 a field solver comprising a processor configured to determine physical dimensions for an inductance tuning transistor and a capacitor tuning transistor, such that a characteristic impedance range is minimized. 
 
     
     
       12. The system of  claim 11 , wherein the parameter module is further configured to determine a target capacitance for the capacitance tuning transistor based on the electrical parameters and a target capacitance range, and to determine a physical width of the capacitance tuning transistor based on a capacitance-per-width factor associated with a given manufacturing technology. 
     
     
       13. The system of  claim 12 , wherein the parameter module is further configured to determine physical dimensions for the inductance tuning transistor comprises determining a physical width of the inductance tuning transistor based on the determined target capacitance for the capacitance tuning transistor that minimizes a difference between a high characteristic impedance and a low characteristic impedance. 
     
     
       14. The system of  claim 11 , further comprising a simulation module configured to determine resistance and inductance values of and between phase shifter components based on the determined electrical parameters to produce simulated circuit with a target phase shift range. 
     
     
       15. The system of  claim 11 , further comprising a simulation module configured to determine whether a tuning range of a tunable phase shifter based on the determined electrical and physical parameters meets or exceeds a target phase shift range. 
     
     
       16. The system of  claim 15 , wherein the parameter module is further configured to adjust the physical dimension limits and repeating said steps of determining if the tuning range is below the target phase shift range. 
     
     
       17. The system of  claim 15 , wherein the simulation module is further configured to calculate the tuning range of the tunable phase shifter according to a determined first capacitance between a signal line and a crossing line; a determined second capacitance between the crossing line, an inductance return line, and all grounded structures; and a capacitance of the capacitor tuning transistor. 
     
     
       18. The system of  claim 17 , wherein the tuning range of the tunable phase shifter is calculated as the ratio C HIGH /C LOW =(C A +C B +C FET )/(C B +C FET ), where C HIGH  is a maximum tunable capacitance, C LOW  is a minimum tunable capacitance, C A  is the determined first capacitance, C B  is the determined second capacitance, and C FET  is the capacitance of the capacitor tuning transistor. 
     
     
       19. The system of  claim 11 , wherein the physical dimension limits include a width of a signal line, a width of ground lines, a spacing between the signal line and the ground lines, and a width of crossing lines.

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